User manual
Table Of Contents
- COVER
- TABLE OF CONTENTS
- CHAPTER 1 GENERAL INFORMATION
- CHAPTER 2 DEBUG MONITOR DESCRIPTION
- CHAPTER 3 DEBUG MONITOR COMMANDS
- CHAPTER 4 ASSEMBLER/DISASSEMBLER
- CHAPTER 5 SYSTEM CALLS
- CHAPTER 6 DIAGNOSTIC FIRMWARE GUIDE
- APPENDIX A S-RECORD INFORMATION
- APPENDIX B SELF-TEST ERROR MESSAGES
- APPENDIX C USER CUSTOMIZATION
- LIST OF FIGURES
- LIST OF TABLES
- Table 2-1. Debugger Address Parameter Format
- Table 2-2. CPU32Bug Exception Vectors
- Table 3-1. Debug Monitor Commands
- Table 4-1. CPU32Bug Assembler Addressing Modes
- Table 5-1. CPU32Bug System Call Routines
- Table 6-1. MCU CPU Diagnostic Tests
- Table 6-2. Memory Diagnostic Tests
- Table B-1. Self-Test Error Messages
- Table C-1. CPU32Bug Customization Area
- Table C-2. MCU SCI Communication Formats
- Table C-3. Rev. A Chip Selection Summary
- Table C-4. Rev. B Chip Selection Summary
- Table C-5. BCC Rev. C Chip Selection Summary
- Table C-6. PFB Rev. C Compatibility
- CHAPTER 1 GENERAL INFORMATION
- CHAPTER 2 DEBUG MONITOR DESCRIPTION
- CHAPTER 3 DEBUG MONITOR COMMANDS
- 3.1 INTRODUCTION
- 3.2 BLOCK OF MEMORY COMPARE
- 3.3 BLOCK OF MEMORY FILL
- 3.4 BLOCK OF MEMORY MOVE
- 3.5 BREAKPOINT INSERT/DELETE
- 3.6 BLOCK OF MEMORY SEARCH
- 3.7 BLOCK OF MEMORY VERIFY
- 3.8 DATA CONVERSION
- 3.9 DUMP S-RECORDS
- 3.10 GO DIRECT (IGNORE BREAKPOINTS)
- 3.11 GO TO NEXT INSTRUCTION
- 3.12 GO EXECUTE USER PROGRAM
- 3.13 GO TO TEMPORARY BREAKPOINT
- 3.14 HELP
- 3.15 LOAD S-RECORDS FROM HOST
- 3.16 MACRO DEFINE/DISPLAY/DELETE
- 3.17 MACRO EDIT
- 3.18 MACRO EXPANSION LISTING ENABLE/DISABLE
- 3.19 MEMORY DISPLAY
- 3.20 MEMORY MODIFY
- 3.21 MEMORY SET
- 3.22 OFFSET REGISTERS DISPLAY/MODIFY
- 3.23 PRINTER ATTACH/DETACH
- 3.24 PORT FORMAT
- 3.25 REGISTER DISPLAY
- 3.26 COLD/WARM RESET
- 3.27 REGISTER MODIFY
- 3.28 REGISTER SET
- 3.29 SWITCH DIRECTORIES
- 3.30 TRACE
- 3.31 TRACE ON CHANGE OF CONTROL FLOW
- 3.32 TRANSPARENT MODE
- 3.33 TRACE TO TEMPORARY BREAKPOINT
- 3.34 VERIFY S-RECORDS AGAINST MEMORY
- CHAPTER 4 ASSEMBLER/DISASSEMBLER
- CHAPTER 5 SYSTEM CALLS
- 5.1 INTRODUCTION
- 5.2 SYSTEM CALL ROUTINES
- 5.2.1 Calculate BCD Equivalent Specified Binary Number
- 5.2.2 Parse Value, Assign to Variable
- 5.2.3 Check for Break
- 5.2.4 Timer Delay Function
- 5.2.5 Unsigned 32 x 32 Bit Divide
- 5.2.6 Erase Line
- 5.2.7 Input Character Routine
- 5.2.8 Input Line Routine
- 5.2.9 Input Serial Port Status
- 5.2.10 Unsigned 32 x 32 Bit Multiply
- 5.2.11 Output Character Routine
- 5.2.12 Output String Using Pointers
- 5.2.13 Print Carriage Return and Line Feed
- 5.2.14 Read Line to Fixed-Length Buffer
- 5.2.15 Read String Into Variable-Length Buffer
- 5.2.16 Return to CPU32Bug
- 5.2.17 Send Break
- 5.2.18 Compare Two Strings
- 5.2.19 Timer Initialization
- 5.2.20 Read Timer
- 5.2.21 Start Timer at T=0
- 5.2.22 Output String with Data
- 5.2.23 Output String Using Character Count
- CHAPTER 6 DIAGNOSTIC FIRMWARE GUIDE
- 6.1 INTRODUCTION
- 6.2 DIAGNOSTIC MONITOR
- 6.2.1 Monitor Start-Up
- 6.2.2 Command Entry and Directories
- 6.2.3 Help (HE)
- 6.2.4 Self Test (ST)
- 6.2.5 Switch Directories (SD)
- 6.2.6 Loop-On-Error Mode (LE)
- 6.2.7 Stop-On-Error Mode (SE)
- 6.2.8 Loop-Continue Mode (LC)
- 6.2.9 Non-Verbose Mode (NV)
- 6.2.10 Display Error Counters (DE)
- 6.2.11 Clear (Zero) Error Counters (ZE)
- 6.2.12 Display Pass Count (DP)
- 6.2.13 Zero Pass Count (ZP)
- 6.3 UTILITIES
- 6.4 CPU TESTS FOR THE MCU
- 6.5 MEMORY TESTS (MT)
- 6.6 BUS ERROR TEST
- APPENDIX A S-RECORD INFORMATION
- APPENDIX B SELF-TEST ERROR MESSAGES
- APPENDIX C USER CUSTOMIZATION
ASSEMBLER/DISASSEMBLER
M68CPU32BUG/D 4-6
4.2.1.5 Character Set
The character set recognized by the CPU32Bug assembler is a subset of ASCII and listed below:
• The letters A through Z (uppercase and lowercase)
• The integers 0 through 9
• Arithmetic operators: +, -, *, /, <<, >>, !, &
• Parentheses ( )
• Characters used as special prefixes:
# (pound sign) specifies the immediate form of addressing.
$ (dollar sign) specifies a hexadecimal number.
& (ampersand) specifies a decimal number.
@ (commercial at sign) specifies an octal number.
% (percent sign) specifies a binary number.
’ (apostrophe) specifies an ASCII literal character string.
• Five separating characters:
Space
. (period)
/ (slash)
- (dash)
• The asterisk (*) character indicates current location.
4.2.2 Addressing Modes
Effective address modes, combined with operation codes, define the particular function
performed by a given instruction. Effective addressing and data organization are described in
detail in the CPU32 Reference Manual.
ASSEMBLER/DISASSEMBLER
M68CPU32BUG/D 4-3
4.2.1 Source Line Format
Each source statement is a combination of operation and, as required, operand fields. Line
numbers, labels and comments are not used.
4.2.1.1 Operation Field
Since there is no label field, the operation field may begin in the first available column. It may
also follow one or more spaces. Entries can consist of one of three categories:
• Operation codes which correspond to the M68300 Family instruction set.
• Define constant directive (DC.W) defines a constant in a word location.
• System call directive (SYSCALL) calls CPU32Bug system utilities.
The size of the data field affected by an instruction is determined by the data size codes. Some
instructions and directives can operate on more than one data size. For these operations, the data
size code must be specified or a default size applicable to the instruction is used. The size code
need not be specified if only one data size is permitted by an operation. The operation field is
followed by a period (.) and the data size code. The data size codes are:
B = Byte (8-bit data)
W = Word (16-bit data; the usual default size)
L = Longword (32-bit data)
When the instruction or directive does not have a data size attribute, the data size code is not
permitted.
EXAMPLES Legal
LEA (A0),A1 Load the effective address of the first operand into A1. The longword
size is the default (.B, .W not allowed) for this instruction.
ADD.B (A0),D0 Add the byte pointed to in A0 to the lowest order byte in D0.
ADD D1,D2 Add the low order word of D1 to the low order word of D2. W is the
default size code for ADD.
ADD.L A3,D3 Add the entire 32-bit (longword) contents of A3 to D3.
EXAMPLE Illegal
SUBA.B #5,A1 Illegal size specification (.B not allowed in instruction SUBA). This
instruction would have subtracted the value 5 from the low order byte
of A1; byte operations on address registers are not allowed.
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