User manual

DEBUG MONITOR COMMANDS
M68CPU32BUG/D REV 1 3-66
TT Trace To Temporary Breakpoint TT
3.33 TRACE TO TEMPORARY BREAKPOINT
TT <addr>
Use the TT command to set a temporary breakpoint at a specified address and trace until
encountering a 0 count breakpoint. The temporary breakpoint is then removed (TT is analogous
to the GT command) and control is returned to CPU32Bug. Tracing starts at the target PC
address. As each instruction is traced, a register display printout is generated.
During tracing, breakpoints in ROM or write protected memory are monitored (but not inserted)
for all trace commands which allow the use of breakpoints. Control is returned to CPU32Bug if a
breakpoint with 0 count is encountered. See the trace (T) command for more details.
The trace functions are implemented with the trace bits (T0, T1) in the MCU status register. Do
not modify trace bits (T0, T1) while using the trace commands. Because the trace functions are
implemented using the hardware trace bits in the MCU, code in ROM can be traced. During trace
mode, breakpoints are monitored and their counts decremented when the corresponding
instruction with breakpoint is traced. This allows breakpoints to work in ROM, but only in the
trace mode.
EXAMPLE The following program resides at location $7000.
CPU32Bug>MD 7000;DI<CR>
00007000 2200 MOVE.L D0,D1
00007002 4282 CLR.L D2
00007004 D401 ADD.B D1,D2
00007006 E289 LSR.L #$1,D1
00007008 66FA BNE.B $7004
0000700A E20A LSR.B #$1,D2
0000700C 55C2 SCS.B D2
0000700E 60FE BRA.B $700E
CPU32Bug>
Initialize PC and D0:
CPU32Bug>RM PC<CR>
PC =00008000 ? 7000.<CR>
CPU32Bug>RM D0<CR>
D0 =00000000 ? 8F41C.<CR>
DEBUG MONITOR COMMANDS
M68CPU32BUG/D REV 1 3-63
TC Trace On Change Of Control Flow TC
3.31 TRACE ON CHANGE OF CONTROL FLOW
TC [<count>]
Use the TC command to start execution at the address in the target PC. Tracing begins at
detection of an instruction that causes a change of control flow, such as Bcc, JSR, BSR, RTS,
etc. Execution is in real time until a change of flow instruction is encountered. The optional
count field specifies the number of change of flow instructions to be traced before returning
control to CPU32Bug. The optional count field default is 1. Register display printout only occurs
when a change of control flow occurs.
During tracing, breakpoints in ROM or write protected memory are monitored (but not inserted)
for all trace commands which allow the use of breakpoints. Note that the TC command
recognizes a breakpoint only if it is at a change of flow instruction. Control is returned to
CPU32Bug if a breakpoint with 0 count is encountered. See the trace (T) command for more
details.
The trace functions are implemented with the trace bits (T0, T1) in the MCU device status
register. Do not modify the trace bits (T0, T1) while using the trace commands. Because the trace
functions are implemented using the hardware trace bits in the MCU, code in ROM can be
traced. During trace mode, breakpoints are monitored and their counts decremented when the
corresponding instruction with breakpoint is traced. This allows breakpoints to work in ROM,
but only in the trace mode.
EXAMPLE The following program resides at location $7000.
CPU32Bug>MD 7000;DI<CR>
00007000 2200 MOVE.L D0,D1
00007002 4282 CLR.L D2
00007004 D401 ADD.B D1,D2
00007006 E289 LSR.L #$1,D1
00007008 66FA BNE.B $7004
0000700A E20A LSR.B #$1,D2
0000700C 55C2 SCS.B D2
0000700E 60FE BRA.B $700E
CPU32Bug>
Initialize PC and D0:
CPU32Bug>RM PC <CR>
PC =00008000 ? 7000.<CR>
CPU32Bug>RM D0 <CR>
D0 =00000000 ? 8F41C.<CR>
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eescale S
emiconduct
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Freescale Semiconductor, Inc.
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