User manual

Table Of Contents
DEBUG MONITOR COMMANDS
M68CPU32BUG/D REV 1 3-46
OF Offset Registers Display/Modify OF
Offset register rules:
At power-up and cold-start reset, R7 is the automatic register, and all offset registers
have both base and top addresses preset to 0. This disables the offset registers.
R7 always has both base and top addresses set to 0; it cannot be changed.
Any offset register can be set as the automatic register.
The automatic register is always added to every absolute address argument of every
CPU32Bug command where an offset register is not explicitly defined (this includes
the OF command itself). To enter an absolute address, always add R7 to the address,
i.e. +R7.
The register commands (RD, RM) do not use the automatic register, i.e. the program
counter is always displayed/entered absolutely. However, the RS (register set)
command does use the automatic register.
There is always an automatic register. To disable the effect of the automatic register
set R7 as the automatic register. This is the default condition.
EXAMPLES Display offset registers. Shows base and top values for each register.
CPU32Bug>OF<CR>
R0 = 00000000 00000000 R1 = 00000000 00000000
R2 = 00000000 00000000 R3 = 00000000 00000000
R4 = 00000000 00000000 R5 = 00000000 00000000
R6 = 00000000 00000000 R7*= 00000000 00000000
Modify offset registers.
CPU32Bug>OF R0<CR>
R0 = 00000000 00000000? 5000 50FF<CR>
R1 = 00000000 00000000? 5100:200^<CR>
Modify and backup
R0 = 00020000 000200FF? <CR> No change, backup still utilized
R6 = 00000000 00000000? .<CR> Exit. Notice wrap around to R6.
Display location $5000. Shows base and top values for each register.
CPU32Bug>M 5000;DI<CR>
00000+R0 41F95445 5354 LEA.L ($54455354).L,A0 .<CR>
CPU32Bug>M R0;DI <CR>
00000+R0 41F95445 5354 LEA.L ($54455354).L,A0 .<CR>
CPU32Bug>
DEBUG MONITOR COMMANDS
M68CPU32BUG/D REV 1 3-43
MM Memory Modify MM
EXAMPLES
CPU32Bug>MM 3100<CR> Access location 3100.
00003100 1234?<CR>
00003102 5678? 4321<CR> Modify memory.
00003104 9ABC? 8765^<CR> Modify memory and backup.
00003102 4321?<CR> No change, backup still utilized.
00003100 1234? abcd.<CR> Modify memory and exit.
CPU32Bug>MM 3001;LA<CR> Longword access to location 3001.
00003001 CD432187?<CR> Alternate location accesses.
00003009 00068010? 68010+10=<CR> Modify and re-open location.
00003009 00068020?<CR> No change, re-open still utilized.
00003009 00068020? .<CR> Exit MM.
CPU32Bug>MM 4000<CR> Modify WORDs starting at $4000.
00004000 0000? ’A’<CR> Enter ASCII ’A’, right justified.
00004002 0000? ’B’<CR> Enter ASCII ’B’, right justified.
00004004 0000? ’CD’<CR> Enter ASCII ’CD’, right justified.
00004006 0000? ’EFG’<CR> Enter ASCII ’FG’, right justified. Note the ’E’ is
truncated due to right justified WORD size!
00004008 0000? .<CR> Exit MM.
CPU32Bug>MD 4000<CR>
00004008 0041 0042 4344 4647 0000 0000 0000 0000 .A.BCDFG........
CPU32Bug>
The DI option activates the one-line assembler/disassembler. All other options are invalid if DI is
selected. The contents of the specified memory location is disassembled and displayed and the
user prompted for an input with a question mark ( ? ). At this point the user has three options:
Enter <CR> – This closes the present location and continues with disassembly of the
next instruction. The instruction is unchanged.
Enter a new source instruction followed by <CR> – This actuates the assembler to
assemble the new instruction and generate a disassembly of the object code generated.
Enter <CR> – This closes the present location and exits the MM command.
If a new source line is entered (second option above), the present line is erased and replaced by
the new source line.
If an error is found during assembly, the caret symbol (^) appears below the suspect field
followed by an error message. The accessed location is redisplayed.
Refer to Chapter 4 for additional information about the assembler.
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eescale S
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