User manual
Table Of Contents
- COVER
- TABLE OF CONTENTS
- CHAPTER 1 GENERAL INFORMATION
- CHAPTER 2 DEBUG MONITOR DESCRIPTION
- CHAPTER 3 DEBUG MONITOR COMMANDS
- CHAPTER 4 ASSEMBLER/DISASSEMBLER
- CHAPTER 5 SYSTEM CALLS
- CHAPTER 6 DIAGNOSTIC FIRMWARE GUIDE
- APPENDIX A S-RECORD INFORMATION
- APPENDIX B SELF-TEST ERROR MESSAGES
- APPENDIX C USER CUSTOMIZATION
- LIST OF FIGURES
- LIST OF TABLES
- Table 2-1. Debugger Address Parameter Format
- Table 2-2. CPU32Bug Exception Vectors
- Table 3-1. Debug Monitor Commands
- Table 4-1. CPU32Bug Assembler Addressing Modes
- Table 5-1. CPU32Bug System Call Routines
- Table 6-1. MCU CPU Diagnostic Tests
- Table 6-2. Memory Diagnostic Tests
- Table B-1. Self-Test Error Messages
- Table C-1. CPU32Bug Customization Area
- Table C-2. MCU SCI Communication Formats
- Table C-3. Rev. A Chip Selection Summary
- Table C-4. Rev. B Chip Selection Summary
- Table C-5. BCC Rev. C Chip Selection Summary
- Table C-6. PFB Rev. C Compatibility
- CHAPTER 1 GENERAL INFORMATION
- CHAPTER 2 DEBUG MONITOR DESCRIPTION
- CHAPTER 3 DEBUG MONITOR COMMANDS
- 3.1 INTRODUCTION
- 3.2 BLOCK OF MEMORY COMPARE
- 3.3 BLOCK OF MEMORY FILL
- 3.4 BLOCK OF MEMORY MOVE
- 3.5 BREAKPOINT INSERT/DELETE
- 3.6 BLOCK OF MEMORY SEARCH
- 3.7 BLOCK OF MEMORY VERIFY
- 3.8 DATA CONVERSION
- 3.9 DUMP S-RECORDS
- 3.10 GO DIRECT (IGNORE BREAKPOINTS)
- 3.11 GO TO NEXT INSTRUCTION
- 3.12 GO EXECUTE USER PROGRAM
- 3.13 GO TO TEMPORARY BREAKPOINT
- 3.14 HELP
- 3.15 LOAD S-RECORDS FROM HOST
- 3.16 MACRO DEFINE/DISPLAY/DELETE
- 3.17 MACRO EDIT
- 3.18 MACRO EXPANSION LISTING ENABLE/DISABLE
- 3.19 MEMORY DISPLAY
- 3.20 MEMORY MODIFY
- 3.21 MEMORY SET
- 3.22 OFFSET REGISTERS DISPLAY/MODIFY
- 3.23 PRINTER ATTACH/DETACH
- 3.24 PORT FORMAT
- 3.25 REGISTER DISPLAY
- 3.26 COLD/WARM RESET
- 3.27 REGISTER MODIFY
- 3.28 REGISTER SET
- 3.29 SWITCH DIRECTORIES
- 3.30 TRACE
- 3.31 TRACE ON CHANGE OF CONTROL FLOW
- 3.32 TRANSPARENT MODE
- 3.33 TRACE TO TEMPORARY BREAKPOINT
- 3.34 VERIFY S-RECORDS AGAINST MEMORY
- CHAPTER 4 ASSEMBLER/DISASSEMBLER
- CHAPTER 5 SYSTEM CALLS
- 5.1 INTRODUCTION
- 5.2 SYSTEM CALL ROUTINES
- 5.2.1 Calculate BCD Equivalent Specified Binary Number
- 5.2.2 Parse Value, Assign to Variable
- 5.2.3 Check for Break
- 5.2.4 Timer Delay Function
- 5.2.5 Unsigned 32 x 32 Bit Divide
- 5.2.6 Erase Line
- 5.2.7 Input Character Routine
- 5.2.8 Input Line Routine
- 5.2.9 Input Serial Port Status
- 5.2.10 Unsigned 32 x 32 Bit Multiply
- 5.2.11 Output Character Routine
- 5.2.12 Output String Using Pointers
- 5.2.13 Print Carriage Return and Line Feed
- 5.2.14 Read Line to Fixed-Length Buffer
- 5.2.15 Read String Into Variable-Length Buffer
- 5.2.16 Return to CPU32Bug
- 5.2.17 Send Break
- 5.2.18 Compare Two Strings
- 5.2.19 Timer Initialization
- 5.2.20 Read Timer
- 5.2.21 Start Timer at T=0
- 5.2.22 Output String with Data
- 5.2.23 Output String Using Character Count
- CHAPTER 6 DIAGNOSTIC FIRMWARE GUIDE
- 6.1 INTRODUCTION
- 6.2 DIAGNOSTIC MONITOR
- 6.2.1 Monitor Start-Up
- 6.2.2 Command Entry and Directories
- 6.2.3 Help (HE)
- 6.2.4 Self Test (ST)
- 6.2.5 Switch Directories (SD)
- 6.2.6 Loop-On-Error Mode (LE)
- 6.2.7 Stop-On-Error Mode (SE)
- 6.2.8 Loop-Continue Mode (LC)
- 6.2.9 Non-Verbose Mode (NV)
- 6.2.10 Display Error Counters (DE)
- 6.2.11 Clear (Zero) Error Counters (ZE)
- 6.2.12 Display Pass Count (DP)
- 6.2.13 Zero Pass Count (ZP)
- 6.3 UTILITIES
- 6.4 CPU TESTS FOR THE MCU
- 6.5 MEMORY TESTS (MT)
- 6.6 BUS ERROR TEST
- APPENDIX A S-RECORD INFORMATION
- APPENDIX B SELF-TEST ERROR MESSAGES
- APPENDIX C USER CUSTOMIZATION
DEBUG MONITOR DESCRIPTION
M68CPU32BUG/D REV 1 2-8
2.5.1 CPU32Bug Vector Table and Workspace
CPU32Bug requires 12k bytes of RAM to operate. On power-up or reset, CPU32Bug allocates
this memory space. The first 1024-bytes are reserved as a user program vector table area and the
second 1024-bytes are reserved as an exception vector table for use by the debugger. Next,
CPU32Bug reserves space for static variables and initializes these variables to predefined default
values. After the static variables, CPU32Bug allocates space for the system stack, then initializes
the system stack pointer to the top of this area.
With the exception of the first 1024-byte vector table area, do not to use the above-mentioned
reserved memory areas. Refer to paragraph 1.6 to define the reserved memory area location. If,
for example, a user program inadvertently wrote over the static variable area containing the serial
communication parameters, these parameters would be lost, resulting in a loss of communication
with the system terminal. If a user program corrupts the system stack, then an incorrect value
may be loaded into the processor’s counter, causing the system to crash.
2.5.2 CPU32Bug Exception Vectors
The debugger exception vectors are listed below. Do not change these specified vector offsets in
the target program vector table or the associated debugger facilities (breakpoints, trace mode,
etc.) will not operate.
Table 2-2. CPU32Bug Exception Vectors
Vector
Number
Offset Exception CPU32bug Facility
4 $10 Illegal Instruction breakpoints (Used instruction by GO, GN,
GT)
9 $24 Trace T. TC, TT
31 $7C Level 7 interrupt ABORT push-button
47 $BC TRAP #15 System calls (see Chapter 5)
66 $108 User Defined Timer Trap #15 Calls ($4X)
When the debugger handles one of the exceptions listed in Table 2-2, the target stack pointer is
left pointing past the bottom of the exception stack frame; that is, it reflects the system stack
pointer values just before the exception occurred. In this way, the operation of the debugger
facility (through an exception) is transparent to the user, but it does change the locations on the
stack.
DEBUG MONITOR DESCRIPTION
M68CPU32BUG/D REV 1 2-5
Table 2-1. Debugger Address Parameter Format
Format Example Description
N 140 Absolute address+contents of automatic offset register.
N+Rn 332+R5 Absolute address+contents of the specified offset register (not an
assembler-accepted syntax).
(An) (A1) Address register indirect.
(d,An)
or
d(An)
(120,A1)
120(A1)
Address register indirect with displacement (two formats accepted).
(d,An,Xn)
or
d(An,Xn)
(&120,A1,D2)
&120(A1,D2)
Address register indirect with index and displacement (two formats
accepted).
Symbol Definition
N - Absolute address (any valid expression)
Dn - Data register n
An - Address register n
Xn - Index register n (An or Dn) d Displacement (any valid expression)
bd - Base displacement (any valid expression) n Register number (0 to 7)
Rn - Offset register n
ZXn - Zero suppressed register Xn
2.2.1.3 Offset Registers
Eight pseudo-registers (R0 through R7) called offset registers are used to simplify the debugging
of re-locatable and position-independent files. These files when listed have a starting address
(normally 0), but when loaded into memory, due to the offset registers, they are loaded into a
different memory location. Implementing offset registers makes it harder to correlate addresses in
the listing with addresses in the loaded program. The offset registers solve this problem by taking
into account this difference and forcing the display of addresses in a relative address+offset
format. The range for each offset register is set by two addresses: base and top. Specifying the
base and top addresses for an offset register sets its range. Offset registers have adjustable ranges
which may overlap. In the event that an address falls in two or more offset register ranges, the
one that yields the least offset is chosen.
NOTE
Relative addresses are limited to 1 megabyte (5 digits), regardless
of the range of the closest offset register.
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eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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