User`s manual
MOTOROLA MC68332TUT/D
20
2.9.2 Using Chip-Select Signals to Enable Boot Memory
The MCU CSBOOT chip-select circuit is always enabled from reset. Because the SRAM module is disabled
out of reset, the CSBOOT signal is generally used to select an external boot ROM. The CSBOOT chip-se-
lect circuit features hardware-controlled selection of 8-bit or 16-bit bus width. Bus width is controlled by the
state of the DATA0 line at the release of the RESET signal. The default bus width out of reset is 16 bits,
because the DATA0 line is pulled up to logic level1 internally; however, the internal pull-up circuit is weak,
so it is best to follow the recommendations in 2.1 Using Data Bus Pins to Configure the MCU
For example, to design a system that uses16-bit boot memory built from two 27C512 byte EPROMs, con-
nect the chip-select and output enable lines of the EPROMs to the CSBOOT line. Also connect MCU ad-
dress lines ADDR[1:16] to address lines [0:15] of the memories. Do not use ADDR0 of the MCU. This
system will be word accessible only.
In general, the MCU cannot make byte writes to word memory selected by CSBOOT
. This lack of byte write
capability is not much of a practical limitation, since the CSBOOT signal is generally used for read-only ac-
cess, and all CPU32 instructions must be word-aligned. However, if byte-write capability is required, the SIZ
and CSBOOT signals can be used to generate “high byte” and “low byte” chip-select signals. The only other
way to modify individual bytes is to use word moves, being careful to write the original data back to the un-
changed byte.
2.9.3 Using Chip-Select Signals to Enable External Memory
Chip-select signals can be configured for 8-bit or 16-bit ports. To use an 8-bit memory, connect its data lines
to the upper half of the MCU data bus (DATA[15:8]). The MCU reads and writes an 8-bit port on the upper
half of the data bus. During write cycles, data is echoed on the lower half of the data bus as well. Connect
address line ADDR0 of the MCU to A0 of the memory. An example configuration is shown in Figure 13. To
use a 16-bit memory, connect the memory data lines to MCU data bus (DATA[15:0]). Connect address line
ADDR1 from the MCU to A0 of the memory.
Figure 13 Using Chip-Select Signals to Enable 8-Bit RAM
332TUT EXT MEM CONN 1
MCU
ADDR[16:0]
DATA[15:0]
R/W
CSO
CSBOOT
ROM ENABLE
ADDR[16:1]
DATA
RAM
32K X 8
ROM
32K X 16
CE
ADDR[13:0]
R/W
DATA[15:8]
DATA[15:0]
ADDR
DATA
ADDR
CE