Stereo System User Manual

MOTOROLA 19
3.1 CHANGE TO THE PROGRAMMING MODEL (INTEGER MODE)
To support the integer mode, bit 25 of the status register now features a new integer mode
(IM) bit as shown in Figure 3.
When the IM bit is cleared (0) the integer mode is disabled. When the IM bit is set, the
processor is in integer mode. The IM bit is cleared during reset.
3.1.1 Switching Into Integer Mode
The correct sequence for switching from the floating-point mode to integer mode is:
ORI #2,mr ; set the IM bit in MR register
NOP ; pipeline delay
NOP ; pipeline delay
parallel integer operation
4 SINGLE PRECISION MODE
The efficiency of the data ALU register file has been improved with the definition of the
new single precision mode (SPM), where the user has access to two data ALU register
files: a 10 floating-point register file (d0.h..d9.h, d0.m..d9.m) and a 10 integer register file
(d0.l..d9.l). If the program uses only single-precision MOVE operations and floating-point
LF
*
I1 I0 FZ MP IM
*
31 30 29 28 27 26 25 24
Integer Mode
Multiply
Flush to Zero
Interrupt Mask
Reserved
Loop Flag
MR
*
R1 R0 SIOP SOVF SUNF SDZ SINX
23 22 21 20 19 18 17 16
IER
UN S OP
CC NAN NAN ERR OVF UNF DZ INX
15 14 13 12 11 10 9 8
ER
A R LR I N Z V C
7 6 5 4 3 2 1 0
CCR
Reserved
Figure 3 - DSP96002 Programming Model