Stereo System User Manual

MOTOROLA DSP96002 USER’S MANUAL A - 21
ADDC Add with Carry ADDC
Instruction Fields:
(u u)
Dddd
Dn.L n n n where nnn = 0-7
Ssss
Dn.L n n n where nnn = 0-7
Timing: 2 + mv oscillator clock cycles
Memory: 1 + mv program words
DATA BUS MOVE FIELD 00 1sss uu01 1ddd
31 14 13 0
OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA
Operation:
D.L + S.L + C
→ D.L (parallel data bus move)
Assembler Syntax:
ADDC S,D (move syntax - see the MOVE in-
struction description.)
Description:
Add the low portion of the two specified operands along with the C bit of the condition code register and
store the result in the low portion of destination operand D. When doing multiple precision addition, the
higher precision long words of the input variables must be moved to the low portion of the Dn register.
Input Operand(s) Precision: 32-bit integer.
Output Operand Precision: 32-bit integer.
CCR Condition Codes:
C - Set if carry is generated from the MSB of the result. Cleared otherwise.
V - Set if result overflows. Cleared otherwise.
Z - Cleared if the result is not zero. Unchanged otherwise.
N - Set if result is negative. Cleared otherwise.
I - Not affected.
LR - Not affected.
–
R - Not affected.
A - Not affected.
ER Status Bits: Not affected.
IER Flags: Not affected.
Instruction Format: ADDC S,D (move syntax - see the MOVE instruction description.)