User`s guide

Inline Assembly Language and Intrinsics
Intrinsic Functions
173Targeting MC56F83xx/DSP5685x Controllers
NOTE Ignores upper N-5 bits of s_shftamount except the sign bit (MSB).
If s_shftamount is positive and the value in the lower 5 bits of
s_shftamount is greater than 15, the result is 0 if sval2shft is positive,
and 0xFFFF is sval2shft is negative.
If s_shftamount is negative and the absolute value in the lower 5 bits
of s_shftamount is greater than 15, the result is 0.
Prototype
Word16 shrtNs(Word16 sval2shft, Word16 s_shftamount)
Example
short result;
short s1 = 0x2468;
short s2= 1;
result = shrtNs(s1,s2);
// Expected value of result: 0x1234
L_shl
Arithmetic shift of 32-bit value by a specified shift amount. If the shift count is
positive, a left shift is performed. Otherwise, a right shift is performed. Saturation may
occur during a left shift. When an accumulator is the destination, zeroes out the LSP
portion.
NOTE
This operation is not optimal on the DSP56800E because of the
saturation requirements and the bidirectional capability. See the
intrinsic L_shlftNs or L_shlfts which are more optimal.
Assumptions
OMR’s SA bit was set to 1 at least 3 cycles before this code, that is, saturation on data
ALU results enabled.