User`s guide

Inline Assembly Language and Intrinsics

Intrinsic Functions

171Targeting MC56F83xx/DSP5685x Controllers

Example

short result;

short s1 = 0x1234;

short s2 = 3;

result = shlfts(s1,s2);

// Expected value of result: 0x91a0

shr

Arithmetic shift of 16-bit value by a specified shift amount. If the shift count is

positive, a right shift is performed. Otherwise, a left shift is performed. Saturation may

occur during a left shift. When an accumulator is the destination, zeroes out the LSP

portion.

NOTE

This operation is not optimal on the DSP56800E because of the

saturation requirements and the bidirectional capability. See the

intrinsic shrtNs which is more optimal.

Assumptions

OMR’s SA bit was set to 1 at least 3 cycles before this code, that is, saturation on data

ALU results enabled.

Prototype

Word16 shr(Word16 sval2shft, Word16 s_shftamount)

Example

short result;

short s1 = 0x2468;

short s2= 1;

result = shr(s1,s2);

// Expected value of result: 0x1234