Technical information

 Functions Written from Scratch A-3
A.3 Optimized Ported Version of RXEQERR
RXEQERR
move.w #$0,n
moveu.w #EQX,r3
moveu.w #DECX,r0
moveu.w #DP,r1
moveu.w #DX,r2 ; Get the hard decision value of I
; Get the hard decision value of Q
; Get the soft decision value of I
move.w x:(r0)+,y0 x:(r3)+,x0
tfr x0,b x:(r0)+n,y1
sub y0,b ; Calculate DX=EQX-DECX
mpy x0,y1,a x:(r3)+n,x0 ; Calculate EQX*DECY
macr -x0,y0,a ; Calculate DP=EQX*DECY-EQY*DECX
tfr x0,a a,x:(r1)+n ; Store the calculated DP
sub y1,a b,x:(r2)+ ; Calculate DY=EQY-DECY
; Store DX
move.w b,y0
mpy y0,y0,b a,x:(r2)+ ; Calculate DX*DX
; Store DY=EQY-DECY
move.w a,y0
mac y0,y0,b ; Calculate DX*DX+DY*DY
asl b ; Compute 2*(DX*DX+DY*DY)
; Compute 4*(DX*DX+DY*DY)
asl b x:(r2)+n,x0 ; bring x:>NOISE in x0
move.w #$7000,y0
mac x0,y0,b ; NOISE=4*(DX*DX+DY*DY)+
; $7000*NOISE
move.w b,x:(r2)+n ; Store the accumulated NOISE
EQUD22
move.w #0,y1 ; If the phase error is positive,
; y1 will be set to zero. Else
; it will be set to $8000
move.w x:(r1)+n,a ; Get the phase error
tst a ; If the phase error is zero then
; skip normalization process
jeq CAR_NOR ; If the phase error is negative
jgt APOS ; If the phase error is negative
move.w #$0100,y1 ; set y1 to $8000
APOS
deca r3 ; resetting the address registers
deca r0
move.w x:(r0)+,y0 x:(r3)+,x0 ; Get EQX,DECX
mpy x0,y0,b x:(r0)+n,y0 x:(r3)+,x0
; Compute EQX*DECX
; Get EQY,DECY
macr x0,y0,b ; Calculate realp=EQX*DECX+EQY*DECY
move.w #0,x0 ; If realp value is +ve set x0 to
; zero
tst b ; Test whether realp value is +ve
; or not
jgt BPOS
move.w #$0100,x0 ; If found -ve set x0 to $8000
BPOS
abs b ; Compute |realp|
move.w b,y0 ; Move |realp| into a register for
; the division operation
abs a ; Compute |DP|
cmp a,b ; Check whether |realp|>|DP| or not
move.w x0,b1 ; Get the sign information of realp
; in b1
jgt DIVID ; If the divisor > dividend let the
; division takes place
eor y1,b
jmpd TSTSGN ; use delay slots
move.w #$0400,a
DIVID
eor y1,b ; Computation to determine the sign
; of the phase error
bfclr #$0001,sr ; Set the carry bit clear
rep #11
div y0,a
move.w a0,a
TSTSGN
tst b ; Determine the sign of the phase
jeq TANOK ; error and set accordingly
neg a
TANOK
move.w a,x:(r1)+n ; Store the normalized phase error
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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