Technical information

Operations and Memory Access on 32 Bits
Optimizing the Ported Code 13
Code Example 13. Copying a Buffer on DSP56800
SECTION TX_MEM
...
tx_out ds 12 ; The output buffer
...
ENDSEC
SECTION V22B_TX
...
move #tx_out,r1 ; Load address of output buffer
do #12,up_txout ; Repeat 12 times
move x:(r0)+,x0 ; Update 16-bit values array with
move x0,x:(r1)+ ; values obtained from a table.
up_txout
...
ENDSEC
; DSP56800 original code: 12*2 cycles / 2 words
This code was rewritten using 32-bit memory access. Each value is read in a 32-bit accumulator and is
stored in the array using 32-bit access (see Code Example 14).
Code Example 14. Copying a Buffer on DSP56800E
SECTION TX_MEM
...
tx_out dsm 12 ; The output buffer
...
ENDSEC
SECTION V22B_TX
...
moveu.w #tx_out,r1 ; Load address of output buffer
do #6,up_txout ; Repeat 6 times
move.l x:(r0)+,c ; Update 16-bit values array with
move.l c10,x:(r1)+ ; table. The table is read on 32-bit.
up_txout
...
ENDSEC
; DSP56800E optimized code: 6*2 cycles / 2 words
The new code has the same size, but it executes two times faster because the loop is executed only six
times instead of twelve as in the initial version. This optimization method required the alignment of the
vector pointed to by R0 at a 2-word boundary, which was achieved using the assembler directive DSM (see
Code Example 14).
Code Example 15 (taken from the function tx_scr from the file tx_scr.asm) presents how multi-bit 32-bit
shifting can be performed in a single instruction instead of by using a REP followed by a 36-bit shifting.
Code Example 15. Multi-Bit Shifting
rep n ; takes 2 cycles, 1 word
asl a ; takes 1 cycle, 1 word
; DSP56800 original code: 2+n*1 cycles / 2 words
asll.l d,a ; takes 2 cycles, 1 word
; d contains the same value as n in original code
; DSP56800E optimized code: 2 cycles / 1 word
This particular optimization cannot be applied automatically. Programmers must be careful to determine
whether the original program really required 32-bit instead of 36-bit shifting and whether saturation issues
could appear.
The two instances in Code Example 14 and Code Example 15 are the only places in the main project where
32-bit operations and memory access were used, because the processing unit is a nibble (4 bits).
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...