Technical information

12 Porting and Optimizing DSP56800 Applications to DSP56800E 
The improvement achieved by the AGU arithmetic is illustrated in Code Example 10, which is taken from
the function RXDEMOD (from the file rx_demod.asm).
Code Example 10. Performing Address Calculations on DSP56800
do #12,end_rx_demod ; Loop 12 times
...
move.w #SIN_TBL,y0 ; Get address of the table
add.w a1,y0 ; Add offset to the start address
move.w y0,r1 ; Load into the address register
...
end_rx_demod
; DSP56800 original code: 12*4 cycles / 4 words
The presented sequence is 4 words in size and runs in 4 cycles. Code Example 11 shows how the code in
Code Example 10 can be rewritten using AGU arithmetic.
Code Example 11. Performing Address Calculations on DSP56800E Using AGU
move.l #SIN_TBL,r5 ; SIN_TBL address kept in r5
...
do #12,end_rx_demod ; Loop 12 times
...
move a1,r1 ; Load offset in r1
adda r5,r1 ; Add offset to the start address
...
end_rx_demod
; DSP56800E optimized code: 12*2+3 cycles / 4 words
The size of the code remains 4 words (considering the entire function), but the code runs in 2 cycles inside
the loop (which means that the improvement must be multiplied by the number of loops) plus 3 additional
cycles outside the loop. Of course, the code could be also written as in Code Example 12.
Code Example 12. Size Optimization on DSP56800E Using AGU
do #12,end_rx_demod ; Loop 12 times
...
adda #SIN_TBL,a1,r1 ; Add offset a1 to the start address
; and put result in r1
...
end_rx_demod
; DSP56800E optimized code: 12*4 cycles / 2 words
This optimization method is for size. The size decreases by 2 words, but the code would still run in
4cycles.
The arithmetic operations performed for initializing pointers can be easily identified, and the modifications
can be made rather easily if there is no pressure on pointer registers.
3.5 Operations and Memory Access on 32 Bits
Another feature introduced in the DSP56800E core is 32-bit operations. The arithmetical and logical
operations (such as ADD, SUB, CLR, and ASL) are extended to support 32-bit operands. The extended
instructions have the suffix “.L” (ADD.L, SUB.L, CLR.L, and ASL.L). Memory access on 32 bits is also
possible with the new core.
Code Example 13 (taken from the function tx_a_ton from the file tx_feed.asm) illustrates how an array of
data can be copied on the DSP56800. An array with 16-bit elements is updated with values read from a
table. Each value is read in the register X0, and then it is written in the array. In the original version there
were no restrictions regarding the alignment of the array.
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Freescale Semiconductor, Inc.
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