Technical information

New Registers
Optimizing the Ported Code 9
The number of instruction words filling the delay slots must equal the number of delay slots. If some delay
slots cannot be filled with valid instructions, then each unused delay slot must be filled with a NOP
instruction. If a pipeline dependency occurs due to instructions executed in the delay slots, the appropriate
number of interlock cycles are inserted by the core, reducing correspondingly the number of delay-slot
cycles that are available for instructions.
Code Example 4. Pipeline Dependency in Delay Slot
jmpd rx_next_task ; 2-3 cycles 2-3 words
mpy y0,x0,b ; 1 cycle 1 word
move.w b,x:(r1)+n ; 1 cycle 1 word
In Code Example 4, the pipeline dependencies force the MOVE.W instruction in the delay slot to execute
in 2 cycles instead of 1. (For more on pipeline dependencies, see Section 5, Pipeline Effects on
DSP56800E.) The total number of instruction cycles in the delay slots is 3, while JMPD provides only 2
delay slots.
An example from rx_eqerr.asm appears in Code Example 5.
Code Example 5. Using Delay Slots
move y1,x:>LASTDP ; 2 cycles 2 words
add y1,b ; 1 cycle 1 word
move.w b,x:(r1)+n ; 1 cycle 1 word
End_RXEQERR
jmp rx_next_task ; 4-5 cycles 2-3 words
; DSP56800 original code: 8-9 cycles / 6-7 words
move y1,x:>LASTDP ; 2 cycles 2 words
End_RXEQERR
; use delay slots
jmpd rx_next_task ; 2-3 cycles 2-3 words
add y1,b ; 1 cycle 1 word
move.w b,x:(r1)+n ; 1 cycle 1 word
; DSP56800E optimized code: 6-7 cycles / 6-7 words
The first MOVE instruction does not insert any pipeline interlocks, and the ADD instruction in the delay
slot is executed normally (in 1 cycle and with 1 word). Also, the second MOVE.W instruction takes
1 cycle and 1 word.
This optimization can be easily implemented, and it was widely used in the code selected for this
application note. It can be used in every type of code, DSP or control, with respect to the restrictions
specified in the Core Reference Manual.
The main benefit of this optimization is obtained in control code, where flow control instructions are
heavily used.
3.2 New Registers
Compared to the DSP56800, the DSP56800E has the following new registers:
Two new accumulators, C and D
RTID 3
RTSD 3
FRTID 2
Table 6. Available Delay Slots (Continued)
Delayed Instructions Number of Delay Slots
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...