Specifications
Memory Interfaces
DSP56800 Hardware Interface Techniques 17
Initialize GPIO control registers
For a page transition:
i) Set GPIO to zero
ii) Execute external write cycle to latch with 12 waitstates
iii) Set GPIO to one
Note that one address of each bank must be reserved, as the write cycle to the latch will also write the
corresponding address in the previously selected bank.
Figure 15. Expansion Memory
3
3
3-8 Decoder
74LS138
GS72116
GS72116
CE
CE
A
0
A
0
WR
GPIOB0
PS
4-bit
Latch
D
0
-D
2
DSP56F807
OE
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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