Specifications

12 DSP56800 Hardware Interface Techniques 
Memory Interfaces
If EXTBOOT is asserted low during reset, then Mode 0A: boot is automatically entered when exiting
Reset mode.
For DSP56F801, Mode0B is not supported because there is no external memory interface.
Note: Locations zero through three in the program memory space are actually mapped to the first
four locations in the Boot Flash.
Mode zero is useful to enter when coming out of reset for applications while executing primarily from
internal program memory. The reset vector location in Modes zero and three is located in the program
memory space at location P:$0000, P:$0002 for COP timer reset. For Mode zero, this is in internal
program memory. In Mode three, it is in off-chip program memory.
3.1.2 Modes 1 & 2
Modes one and two are NOT SUPPORTED for these parts. They are used for ROM-based members of
the DSP56800 family.
3.1.3 External Mode (Mode 3)
Mode three is a development mode in which the entire 64K program memory space is external. No
internal program memory may be accessed, except as a secondary read of Data RAM. The reset vector
location in Mode three is located in the external program memory space at location P:$0000, P:$0002
for COP timer reset.
3.1.4 DSP56824 Memory Configuration
The DSP56824 has four operating modes that determine the memory maps for program and data
memories and the startup procedure when the chip leaves the Reset state. Operating modes can be
selected either by applying the appropriate signals to the MODA and MODB pins during reset, or by
writing to the OMR and changing the MA and MB bits, as shown in Table 2.
.
Table 3: DSP56824 Program RAM Chip Operating Modes
MB or
MODB
Value
MA or
MODA
Value
Chip
Operating
Mode
Reset Vector
Program Memory Configuration
P:$7F–$0 P:$8000–$80
00Mode 0
Single Chip
Startup
Internal program ROM
P:$0000 or P:$0002
(COP reset)
Read/fetch: internal pro-
gram ROM
Write: internal program
RAM
All accesses:
internal program
ROM
01Mode 1
Single Chip
User
Internal program ROM
P:$7F80 or P:$7F82
(COP reset)
All accesses: internal pro-
gram RAM
All accesses:
internal program
ROM
10Mode 2
Normal
Expanded
External program
memory P:$E000 or
P:$E002
(COP reset)
Read/fetch: internal pro-
gram ROM
Write: internal program
RAM
All accesses:
internal program
ROM
11Mode 3
Development
External program
memory P:$0000 or
P:$0002
(COP reset)
All accesses: external
program memory
All accesses:
external pro-
gram memory
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
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