User`s manual

Chip Errata
DSP56305 Digital Signal Processor
Mask: 0F13S
DSP56305 Errata  1996 - 2002 Motorola pg. 9 /ng/12/20/02
ES47
Description (added 3/3/1997):
If the DMA channel and the core access the same 1/4 K internal X data,
Y data, or program memory page, and the DMA interrupt is enabled, a
false interrupt may occur in addition to the correct one.
Workaround: Ensure that the channel’s DTD status bit in the DSTR is set
before jumping to the Interrupt Service Routine (i.e., the interrupt is
correct only when DTD is set).
Example:
ORG P:I_DMA0
JSSET #M_DTD0,X:M_DSTR,ISR_ ; ISR_ is the Interrupt
; Service
; Routine label for DMA
; channel 0
0F13S
Errata
Number
Errata Description
Applies
to Mask