User`s manual

Chip Errata
DSP56305 Digital Signal Processor
Mask: 0F13S
DSP56305 Errata 1996 - 2002 Motorola pg. 27 /ng/12/20/02
ES115
cont.
;; X, Y or P memory
;; location, should be
;; initialized to $000000
;; M_DDRC -
;; address of the channel C
;; DDR register .
movep #TR_LENGTH, x:M_DCOC ;; see below the definition
;; of the TR_LENGTH value,
;; M_DCOC - address
;; of the channel C DCO
register .movep #1f0240, x:M_DCRC ;; M_DCRB - address of the
;; channel C DCR register.
;; Set transfer mode -
;; block transfer,
;; triggered by
;; software highest
;; priority, continuous
;; mode on no-update
;; source and destination
;; address mode X memory
;; location for source
;; and destination (can be
;; chosen by
;; user accordingly to
;; DSR_swflag/DDR_swflag)
0F13S
ES115
cont.
;; disable DMA channel "A"
ori #3, mr ;; mask all interrupts
bset #23, x:M_DCRC ;; enable DMA channel C
bclr #23,x:DDR_swflag,* ;; wait until DMA channel C
;; begin transfer
bclr #23, x:M_DCRA ;; disable DMA channel A
nop
nop
jclr #M_DTDA, x:M_DSTR,* ;; polling DTD bit of the DMA
;; channel A,
The TR_LENGTH value can be defined as the maximum length of the
external DMA transfer——from the length of the read DMA cycle and
from the length of the write DMA cycle. The length of the external
read/write DMA cycle can be defined as the length of the PORTA
external access. The length of the internal read/write DMA cycle
can be defined in the errata case as 2 DSP clock cycles. The
TR_LENGTH can be found as sum of the lengths of the DMA read and
DMA write cycles.
0F13S
Errata
Number
Errata Description
Applies
to Mask