User`s manual

Chip Errata
DSP56305 Digital Signal Processor
Mask: 0F13S
DSP56305 Errata  1996 - 2002 Motorola pg. 13 /ng/12/20/02
ES50
Description (added 6/9/1997):
If the HI32 is programmed to operate in Universal Bus mode, a spike may
be generated on the HTA pin before it is tri-stated. The spike polarity
depends on the HTA pin mode; the spike is positive if the pin is
programmed as active low and negative if the pin is programmed to be
active high. This spike causes a problem if an active high (HTA) line is
connected to a pull-up resistor or an active low line (HTA
) is connected
to a pull-down resistor. In either case, the HTA signal may appear to
indicate a Not Ready state to the mastering device while accessing a
device that does not drive the HTA.
Workaround.
Use one of the following alternatives:
a. Connect a signal programmed as active high (HTA) to a pull-down
resistor or connect a signal programmed as active low (HTA
) to a
pull-up resistor.
b. The spike does not affect the system functionality if the RC time
defined by pull-up or pull-down resistor combined with the HTA
load capacitance is less then the data strobe deassertion time.
c. Use external circuitry to drives the HTA line to the required level
while the data strobe is not asserted. For example, an AAx pin may be
used for this purpose (if the DSP563xx is a mastering device).
0F13S
ES51
Description (added 7/7/1997):
If the HI32 operates as a PCI target and the data FIFO is not serviced by
the DSP at a high enough rate, the HI32 may insert more than 8 wait
states.
Workaround:
Ensure that the DSP services the data FIFO at a high data rate. The
required data rate is guaranteed if the data FIFO is serviced by the DMA
channel with the highest priority.
0F13S
Errata
Number
Errata Description
Applies
to Mask