user manual

INSTRUCTION GROUPS

6 - 24 INSTRUCTION SET INTRODUCTION MOTOROLA

Therefore, the instruction actually ignores what appears to be a duplicate destination and

logically ANDs the value in the X0 register with the bits in the A1 portion (bits 47-24) of

the A accumulator. The parallel move shown above can simultaneously write to either of

the other two portions of the A or the B accumulator without conflict. Avoid confusion by

explicitly stating A1 or B1 in the original instruction.

Optional data transfers may be specified with most logical instructions, allowing parallel

data movement over the XDB and YDB or over the GDB during a data ALU operation.

This parallel movement allows new data to be prefetched for use in subsequent instruc-

tions and allows results calculated in previous instructions to be stored. The following list

includes the logical instructions:

AND Logical AND

ANDI

AND Immediate to Control Register

EOR Logical Exclusive OR

LSL Logical Shift Left

LSR Logical Shift Right

NOT Logical Complement

OR Logical Inclusive OR

ORI

OR Immediate to Control Register

ROL Rotate Left

ROR Rotate Right

*These instructions do not allow parallel data moves.