User`s guide

If fewer than eight pods are available for timing, the logic analyzer will
truncate the pods allocated. In this case, viewing the logic analyzer FORMAT
menu shows the pod allocations. If the allocations will not acquire the desired
signals, the allocations can be altered manually.
Timing (one card)
Configuration File (Timing)
Use configuration file C_33X_1T or
C_37X_1T for Timing analysis with the
HP 16550A logic analyzer.
Chapter 2: Hooking up Your System
To connect to the HP 16550A logic analyzer
2–26 E2480A Motorola CPU32 Preprocessor Interface