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User’s Guide Publication Number E2480-97001 May 1997 For Safety Information, Warranties, and Regulatory Information, see the pages at the end of this manual. Copyright Hewlett-Packard Company 1997 All Rights Reserved.
The HP E2480A Preprocessor Interface — At a Glance The HP E2480A Preprocessor Interface provides a generic interface for state and/or timing analysis between a target system using a Motorola 68331, 68332, 68F333, 68334, 68335, 68336, 68338, or 68376 microcontroller and the following HP logic analyzers: • • • • • • • HP 16550A (one- or two-card) HP 16554A (one- or two-card) HP 16555A/D (one- or two-card) HP 16556A/D (one- or two-card) HP 1660A/61A/62A, HP 1660C/61C/62C HP 1660AS/61AS/62AS, HP 1660CS/61CS/
Introduction HP E2480A Preprocessor Interface with Microcontroller-specific Attachments and Optional Processor Probe E2480A Motorola CPU32 Preprocessor Interface iii
In This Book This book is the user’s guide for the HP E2480A Preprocessor Interface. It assumes that you have a working knowledge of the logic analyzer being used and the microcontroller being analyzed. This user’s guide is organized into the following chapters: Overview • Chapter 1 contains overview information, including a list of required equipment.
Contents The HP E2480A Preprocessor Interface —At a Glance ii 1 Overview Logic Analyzers Supported 1–3 Equipment Used with the Preprocessor 1–4 Equipment supplied 1–4 Minimum equipment required 1–5 Additional equipment supported 1–6 Typical setups using the preprocessor and processor probe together 1–7 Power-ON/Power-OFF Sequence 1–9 For a stand-alone logic analyzer system 1–9 For a prototype analyzer system 1–9 Connection Sequence 1–10 2 Hooking up Your System Connecting the Preprocessor to the Target S
Contents Connecting the High-Density Cables to the Logic Analyzer 2–12 To connect to the HP 1660A/AS/C/CS logic analyzers 2–13 State 2–13 Timing 2–14 To connect to the HP 1661A/AS/C/CS logic analyzers 2–15 State 2–15 Timing 2–16 To connect to the HP 1662A/AS/C/CS logic analyzers 2–17 State 2–17 Timing 2–18 To connect to the HP 1670A/D logic analyzer 2–19 State 2–19 Timing 2–20 To connect to the HP 1671A/D logic analyzer 2–21 State 2–21 Timing 2–22 To connect to the HP 1672A/D logic analyzer 2–23 State 2–23
Contents Configuring the Logic Analyzer 2–36 To load the configuration and inverse assembler 2–36 Connecting Optional Equipment 2–38 To connect the HP E3458A Processor Probe 2–39 To connect the HP 16505A Prototype Analyzer 2–39 3 Analyzing the Target System Modes of Operation 3–3 State mode 3–3 Timing mode 3–3 Format Menu 3–4 Status bit definition and encodings 3–6 Using the Inverse Assembler 3–8 To display captured state data 3–8 To synchronize the inverse assembler 3–9 General output format 3–10 Inve
Contents 5 If You Have a Problem Analyzer Problems 5–3 Intermittent data errors 5–3 Unwanted triggers 5–3 No activity on activity indicators 5–4 No trace list display 5–4 Analyzer won’t power up 5-4 Preprocessor Problems 5–5 Target system will not boot up 5–5 Erratic trace measurements 5–6 Capacitive loading 5–6 Inverse Assembler Problems 5–7 No inverse assembly or incorrect inverse assembly 5–7 Inverse assembler will not load or run 5–8 Intermodule Measurement Problems 5–9 An event wasn’t captured by o
1 Overview
Overview This chapter describes: • • • • • Logic analyzers supported Equipment used with the preprocessor Typical setups using the preprocessor and processor probe together Power-on/power-off sequence Connection sequence 1-2 E2480A Motorola CPU32 Preprocessor Interface
Logic Analyzers Supported For the HP 16500B mainframe, software revision 3.04 or higher is recommended. For the HP 16500C mainframe, software revision 1.0 or higher is recommended. Logic Analyzer Channel Count State Speed Timing Speed Memory Depth 1660A/AS/C/CS 136 100 MHz 250 MHz 4 k states 1661A/AS/C/CS 102 100 MHz 250 MHz 4 k states 1662A/AS/C/CS 68 100 MHz 250 MHz 4 k states 1670A/71A/72A 136/102/68 70 MHz 125 MHz 64 k or .
Equipment Used with the Preprocessor This section lists equipment that can be used with this preprocessor when it is connected to one of the logic analyzers listed on the preceding page. This information is organized under the following titles: • Equipment supplied • Minimum equipment required • Additional equipment supported Equipment supplied If you ordered the HP E2480A Preprocessor Interface, you received: • The HP E2480A Preprocessor Interface circuit board.
Chapter 1: Overview Equipment Used with the Preprocessor Minimum equipment required For state and/or timing analysis of a Motorola CPU32 target system, you need all of the following: • The HP E2480A Preprocessor Interface, which includes the circuit board, configuration software, and the User’s Guide. • • • • Two HP E5346A high-density cables. A microcontroller-specific transition board. A QFP probe adapter kit for your specific microcontroller package.
Chapter 1: Overview Equipment Used with the Preprocessor Additional equipment supported An HP E3458A Processor Probe can be connected through the HP E2480A to the target system. This eliminates the need for target-system connectors for run control. The processor probe allows the user to halt execution, download code, read/write memory and registers, and step through software. Example connections of a processor probe are shown in the typical setups on the next pages.
Typical setups using the preprocessor and processor probe together The illustrations in this section show typical equipment setups. The setup you choose will depend on the type of development or test you are performing (hardware or software), and the type of logic analyzer you are using. The preprocessor interface supplies signals from the target microcontroller to the logic analyzer. A configuration file sets up the logic analyzer to properly interpret these signals.
Chapter 1: Overview Typical setups using the preprocessor and processor probe together Hardware Designer’s Solution using a Prototype Analyzer, Preprocessor, and Processor Probe Software Designer’s Solution using a PC or Workstation, Preprocessor, and Processor Probe 1-8 E2480A Motorola CPU32 Preprocessor Interface
Power-ON/Power-OFF Sequence Listed below are the sequences for powering on and off a fully-connected preprocessor system. Simply stated, your target system is always the last to be powered ON. For powering OFF, the target system is the first to be powered OFF, then the processor probe (if you have one), then the logic analyzer. The HP E2480A Preprocessor Interface can be powered from either a logic analyzer or the software probe.
Connection Sequence This manual supports connecting the preprocessor to a stand-alone logic analyzer or to a prototype analyzer system. Disconnect power from the logic analyzer and your target system before you make or break connections. If you have a processor probe, also disconnect its power. The connection flow is as follows: 1. 2. 3. 4. 5. 6. 7. Set switches, if necessary, on the preprocessor board. Connect the transition board to the preprocessor interface.
2 Hooking up Your System
Hooking up your System This chapter shows you how to connect your logic analyzer to your target system through the preprocessor interface. It also shows how to connect additional equipment to obtain special features, if desired. This chapter is divided into the following sections: • • • • Connecting the preprocessor to the target system. Connecting the preprocessor to the logic analyzer. Configuring the system. Connecting additional equipment.
Connecting the Preprocessor to the Target System This chapter explains how to connect the HP E2480A Preprocessor Interface to the target system. Connecting to the target system consists of the following steps: • Connecting the probe adapter to the target system. Note that there are separate instructions for the different QFP packages. The instructions in this manual are only an overview. Use the Users Guide included with your probe adapter for detailed connecting procedures.
Chapter 2: Hooking up Your System To connect the transition board to the preprocessor To connect the transition board to the preprocessor The microcontroller-specific transition board properly routes the signals from the probe adapter to the preprocessor interface. To connect the transition board to the preprocessor: • Verify that there are no bent pins on the PGA socket of the preprocessor.
Chapter 2: Hooking up Your System To connect the preprocessor interface to the probe adapter To connect the preprocessor interface to the probe adapter The orientation of the preprocessor interface with respect to the probe adapter depends on the orientation of the probe adapter with respect to pin 1 of the target system. Use the appropriate illustration from the following pages to ensure you have the proper orientation.
Chapter 2: Hooking up Your System Connecting the probe adapter to the target system Connecting the probe adapter to the target system The CPU microcontrollers supported by the HP E2480A Preprocessor Interface come in a variety of QFP packages. The QFP probe adapter assemblies allow the preprocessor interface to be connected to the target system without removing the microcontroller from the target system.
Chapter 2: Hooking up Your System Connecting the probe adapter to the target system 132-pin PQFP Probe Adapter Rotations 132-Pin PQFP Probe Adapter Rotation Diagram E2480A Motorola CPU32 Preprocessor Interface 2–7
Chapter 2: Hooking up Your System Connecting the probe adapter to the target system 144-pin TQFP Probe Adapter Rotations 144-Pin TQFP Probing System Rotation Diagram 2–8 E2480A Motorola CPU32 Preprocessor Interface
Chapter 2: Hooking up Your System Connecting the probe adapter to the target system 160-pin QFP Probe Adapter Rotations 160-Pin QFP Probing System Rotation Diagram E2480A Motorola CPU32 Preprocessor Interface 2–9
Connecting the Preprocessor to the Logic Analyzer This section shows you how to connect the preprocessor to the logic analyzer. It consists of the following: • Connecting the high-density cables to the preprocessor interface • Connecting the high-density cables to the logic analyzer This section shows connection diagrams that identify connections to each individual logic analyzer supported by the preprocessor interface.
Connecting the High-density Cables to the Preprocessor Interface Four high-density cables, and labels to identify them, are included with the HP E81xxA. The labels can be attached to the cables after the cables have been connected to the preprocessor interface and logic analyzer. Connect the cables to the connectors on the preprocessor interface as shown in the illustration below. Note that J1 and J6 are State connectors, and J2 through J5 are Timing connectors.
Connecting the High-Density Cables to the Logic Analyzer The following pages show the connections between the logic analyzer pod cables and the high-density cables of the preprocessor interface. Note that for each logic analyzer, there are separate connections for State and Timing. Refer to the appropriate pages for your logic analyzer. The configuration file names for each logic analyzer and each CPU32 target system are included with the connection diagrams.
Chapter 2: Hooking up Your System To connect to the HP 1660A/AS/C/CS logic analyzers To connect to the HP 1660A/AS/C/CS logic analyzers Use the following two figures to connect the preprocessor to the HP 1660A/C logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. State Configuration File (State Analysis) Use configuration files C_33X_1S or C_37X_1S for state analysis with the HP 1660A/AS/C/CS logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1660A/AS/C/CS logic analyzers If fewer than eight pods are available for timing, the logic analyzer will truncate the pods allocated. In this case, viewing the logic analyzer FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. Timing Configuration File (Timing) Use configuration file C_33X_1T or C_37X_1T for Timing analysis with the HP 1660A/AS/C/CS logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1661A/AS/C/CS logic analyzers To connect to the HP 1661A/AS/C/CS logic analyzers Use the following two figures to connect the preprocessor to the HP 1661A/C logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. State Configuration File (State Analysis) Use configuration files C_33X_1S or C_37X_1S for state analysis with the HP 1661A/AS/C/CS logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1661A/AS/C/CS logic analyzers If fewer than eight pods are available for timing, the logic analyzer will truncate the pods allocated. In this case, viewing the logic analyzer FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. Timing Configuration File (Timing) Use configuration file C_33X_1T or C_37X_1T for Timing analysis with the HP 1661A/AS/C/CS logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1662A/AS/C/CS logic analyzers To connect to the HP 1662A/AS/C/CS logic analyzers Use the following two figures to connect the preprocessor to the HP 1662A/C logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. State Configuration File (State Analysis) Use configuration files C_33X_1S or C_37X_1S for state analysis with the HP 1662A/AS/C/CS logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1662A/AS/C/CS logic analyzers If fewer than eight pods are available for timing, the logic analyzer will truncate the pods allocated. In this case, viewing the logic analyzer FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. Timing Configuration File (Timing) Use configuration file C_33X_1T or C_37X_1T for Timing analysis with the HP 1662A/AS/C/CS logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1670A/D logic analyzer To connect to the HP 1670A/D logic analyzer Use the figure below to connect the preprocessor to the HP 1670A/D logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. State Configuration File (State Analysis) Use configuration file C_33X_2S or C_37X_2S for State analysis with the HP 1670A/D logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1670A/D logic analyzer If fewer than eight pods are available for timing, the logic analyzer will truncate the pods allocated. In this case, viewing the logic analyzer FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. Timing Configuration File (Timing) Use configuration file C_33X_2T or C_37X_2T for Timing analysis with the HP 1670A/D logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1671A/D logic analyzer To connect to the HP 1671A/D logic analyzer Use the figure below to connect the preprocessor to the HP 1671A/D logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. State Configuration File (State Analysis) Use configuration file C_33X_2S or C_37X_2S for State analysis with the HP 1671A/D logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1671A/D logic analyzer If fewer than eight pods are available for timing, the logic analyzer will truncate the pods allocated. In this case, viewing the logic analyzer FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. Timing Configuration File (Timing) Use configuration file C_33X_2T or C_37X_2T for Timing analysis with the HP 1671A/D logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1672A/D logic analyzer To connect to the HP 1672A/D logic analyzer Use the figure below to connect the preprocessor to the HP 1672A/D logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. State Configuration File (State Analysis) Use configuration file C_33X_2S or C_37X_2S for State analysis with the HP 1672A/D logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 1672A/D logic analyzer If fewer than eight pods are available for timing, the logic analyzer will truncate the pods allocated. In this case, viewing the logic analyzer FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. Timing Configuration File (Timing) Use configuration file C_33X_2T or C_37X_2T for Timing analysis with the HP 1672A/D logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 16550A logic analyzer To connect to the HP 16550A logic analyzer Use the figure below to connect the preprocessor to the HP 16550A logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. State Configuration File (State Analysis) Use configuration files C_33X_1S or C_37X_1S for state analysis with the HP 16550A logic analyzer.
Chapter 2: Hooking up Your System To connect to the HP 16550A logic analyzer If fewer than eight pods are available for timing, the logic analyzer will truncate the pods allocated. In this case, viewing the logic analyzer FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. Timing (one card) Configuration File (Timing) Use configuration file C_33X_1T or C_37X_1T for Timing analysis with the HP 16550A logic analyzer.
Chapter 2: Hooking up Your System To connect to the HP 16550A logic analyzer Timing (two card) Configuration File (Timing) Use configuration file C_33X_1T or C_37X_1T for Timing analysis with the HP 16550A logic analyzer.
Chapter 2: Hooking up Your System To connect to the HP 16554/55/56 logic analyzers To connect to the HP 16554/55/56 logic analyzers Use the following two figure below to connect the preprocessor to the HP 16554A/55A/56A and HP 16555D/56D logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. State Configuration File (State Analysis) Use configuration file C_33X_2S or C_37X_2S for State analysis with the HP 16554/55/56 logic analyzers.
Chapter 2: Hooking up Your System To connect to the HP 16554/55/56 logic analyzers If fewer than eight pods are available for timing, the logic analyzer will truncate the pods allocated. In this case, viewing the logic analyzer FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually.
Configuring the Preprocessor and Logic Analyzer This section shows you how to configure the preprocessor and logic analyzer. It consists of the following steps: • Configuring the preprocessor interface • Configuring the logic analyzer The functionality of the preprocessor and logic analyzer, and the accuracy of displays provided by the inverse assembler, depend on the address-reconstruction feature of the preprocessor.
Configuring the preprocessor interface Configuring the preprocessor interface consists of the following: • Setting the ID switches • Interpreting the LEDs • Downloading a configuration To set the ID switches The HP E2480A provides an identification (ID) which may be used by other system components. The ID consists of primary and secondary values. The primary value is fixed (identifies CPU32 family) by hardware.
Chapter 2: Hooking up Your System To interpret the LEDs To interpret the LEDs The LEDs on the preprocessor interface hardware have meanings described below, after the following has been done: 1. The ID switches have been set (described in previous section). 2. The preprocessor configuration has been downloaded. LED Interpretations • LED DS1 - Default This LED identifies the type of configuration loaded into the reconstruction hardware. If the LED is lit, the default configuration is loaded.
Chapter 2: Hooking up Your System To interpret the LEDs HP E2480A LED Locations E2480A Motorola CPU32 Preprocessor Interface 2–33
Chapter 2: Hooking up Your System Downloading a configuration Downloading a configuration The HP E2480A is shipped with all reconstruction disabled. This preprocessor configuration provides accurate analysis when A[19:23], FC[0:2], SIZ0, SIZ1, DSACK0, and DSAK1 are valid. If your target system is configured differently, you must configure the preprocessor to match your target system configuration. To configure the preprocessor, the HP E2480A must be connected to an HP E3458A Processor Probe.
Chapter 2: Hooking up Your System Downloading a configuration and CSORxof all chip selects being used. The second method requires code to be loaded into the target, performing a "reset" and "run", then performing a "break" after the SIM/SCIM registers have been configured. In either case, once the "Configuration"’ window SIM/SCIM register fields contain the desired values, click on the "Load Preprocessor" button.
Configuring the Logic Analyzer Configuring the logic analyzer consists of loading the software by inserting the floppy disk into the logic analyzer disk drive and loading the proper configuration file. The configuration file you use is determined by the logic analyzer you are using, and whether you are performing state analysis or timing analysis. To load the configuration and inverse assembler The first time you set up the preprocessor interface, make a duplicate copy of the master disk.
Chapter 2: Hooking up Your System To load the configuration and inverse assembler The HP 16505A Prototype Analyzer requires software version A.01.22 or higher to work with the HP E2480A.
Chapter 2: Hooking up Your System To load the configuration and inverse assembler Connecting Optional Equipment The remaining portion of this chapter shows you how to connect optional equipment you may wish to use to obtain additional functionality.
Chapter 2: Hooking up Your System To connect the HP E3458A Processor Probe To connect the HP E3458A Processor Probe The processor probe allows you to halt execution, download code (if the target is RAM based), read/write memory and registers, and step through software. The HP E3458A also provides a connector to source-level debuggers, which are available from a number of vendors. Refer to the HP E3458A Data Sheet for a list of supported debuggers.
2–40 E2480A Motorola CPU32 Preprocessor Interface
3 Analyzing the Target System
Analyzing the Target System This chapter describes modes of operation for the HP E2480A Preprocessor Interface. It also describes preprocessor interface data, symbol encodings, and information about the inverse assembler.
Modes of Operation The HP E2480A Preprocessor Interface can be used in State mode or Timing mode. The following sections describe these operating modes. State mode In State mode, the logic analyzer uses clock store qualification to capture address, data, and status information once during an instruction or data cycle. This mode is set up by the State configuration files. The State configuration files also automatically load the inverse assembler.
Format Menu This section describes the organization of Motorola CPU32 signals in the logic analyzer’s Format Menu. The configuration software sets up the analyzer format menu to display pods. The following figures show the Format Menu for the Motorola CPU32 as configured on the HP 16550A.
Analyzing the Target System Timing mode If fewer than eight pods are available for timing, the logic analyzer will truncate the pods allocated. In this case, the logic analyzer Format menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually.
Analyzing the Target System Status bit definition and encodings Status bit definition and encodings This section describes symbol information that has been set up by the preprocessor interface configuration software and information about the available inverse assemblers including filtering and debug monitors. The table below is specifically for a state configuration. The timing configurations have many of the same signals, and those signals are represented by the same symbols used for state configurations.
Analyzing the Target System Status bit definition and encodings CPU32 Symbolic Representation of Status Bits Label ~ShoCy Signal ~Show_Cycle Rd/~Wr Rd/~Wr ~IFtch ~Inst_Fetch ~PFlsh ~Pipe_Flush Sizx Siz[0:1] DSAckx DSAck[0:1] ~BErr ~BErr ~Freez ~Freeze ~Bkpt ~Bkpt ~BGAck ~BGAck FCx FC[0:2] Symbol Int Ext Wr Rd Fetch (blank) Flush (blank) long byte word 3byt (blank) word byte wait Error (blank) Bkgrnd Runnin Break (blank) NoBus (blank) show user data user pgrm (blank) (blank) supr data
Using the Inverse Assembler This section discusses the general output format of the inverse assembler and controller-specific information. This section also assumes that an inverse assembler has been loaded. To display captured state data • Select the Listing Menu for your logic analyzer. The logic analyzer displays captured state data in the Listing Menu. The inverse assembler display is obtained by setting the base for the DATA label to Invasm. The following figure shows a typical Listing Menu.
Analyzing the Target System To synchronize the inverse assembler To synchronize the inverse assembler The CPU32 microcontroller does not indicate externally which word fetched is the beginning of a new instruction. You may have to "point" to the first state of an instruction fetch to synchronize the inverse assembler. Once synchronized, the inverse assembler will disassemble from this state through the end of the screen.
Analyzing the Target System General output format General output format The next few paragraphs describe the general output format of the inverse assemblers. Numeric Format Unless a value is followed by a suffix character, numeric output from the inverse assembler is in hexadecimal format. For example, decimal values have a period (.) as the suffix character; binary values have a percent sign (%). Missing Opcodes/Operands Asterisks (*) in the inverse assembler output indicate missing operands.
Analyzing the Target System General output format Processor-Specific Output Format The logic analyzer captures all bus cycles. This includes background and coprocessor cycles as well as code cycles. A "c" marks coprocessor activity, and background activity is marked with a "b". The "c" and "b" are displayed in the first column of the mnemonic/hex field. Acquisitions of coprocessor and background cycles may be individually enabled/disabled via the trigger menu.
Analyzing the Target System Inverse assembler error messages Inverse assembler error messages Any of the following list of error messages may appear during analysis of your target software. Included with each message is a brief explanation. Fatal Data Error Displayed if the trace memory could not be read properly on entry into the inverse assembler. Illegal Opcode Displayed if the inverse assembler encounters an illegal instruction.
4 Reference
Reference This chapter contains additional reference information including the signal mapping for the HP E2480A Preprocessor Interface.
Reference Operating Characteristics Operating Characteristics The following operating characteristics are not specifications, but are typical operating characteristics for the preprocessor interface. Product Characteristics Microcontroller Supported Motorola 68331, 68332, 68F333, 68334, 68335, 68336, 68338, or 68376 Package Supported 132-pin PQFP 144-pin TQFP 160-pin PQFP Probes Required Mandatory 4 for state. Up to 8 for timing. Accessories Required See chapter 1 for available accessories.
Reference Theory of Operation and Clocking Theory of Operation and Clocking Timing For timing measurements, raw digital signals from the microcontroller are presented to the logic analyzer through the timing connectors. The acquisition clock is provided by the logic analyzer. State For state measurements, all signals are processed by active logic for time alignment before they are routed to the state connectors.
Reference Address reconstruction overview Address reconstruction overview When CPU32 microcontrollers are reconfigured, they can present special problems for debugging. This is especially true when address bits A[19:23] are reconfigured as chip selects. The HP E2480A Preprocessor Interface overcomes these problems by using information in the base address register associated with such chip selects to replace the missing address bits.
Reference Address reconstruction overview Address Reconstruction Overview 4–6 E2480A Motorola CPU32 Preprocessor Interface
Reference Signal-to-connector mapping (Timing) Signal-to-connector mapping (Timing) The following table shows the flow of signals from the microcontroller through the E2480A timing connectors to the logic analyzer. In addition to being grouped along microprocessor-like functions, the signals are also grouped and ordered along their microcontroller port definitions.
Reference Signal-to-connector mapping (Timing) CPU32 SIGNAL NAME E2480A TIMING CONNECTOR PIN ANALYZER BIT TIMING LABEL TIMING SUBLABEL Timing Connector J5, Timing Pod 2 ~BR/CS0 37 0 STAT CSx ~BG/CS1 35 1 STAT CSx ~BGAck/CS2 33 2 STAT CSx DSAck0 31 3 STAT PORT E DSAck1 29 4 STAT PORT E ~AVec 27 5 STAT PORT E ~RMC 25 6 STAT PORT E ~DS 23 7 STAT PORT E ~AS 21 8 STAT PORT E SIZ0 19 9 STAT PORT E SIZ1 17 10 STAT PORT E R/~W 15 11 STAT ~BERR 13 12
Reference Signal-to-connector mapping (Timing) CPU32 SIGNAL NAME E2480A TIMING CONNECTOR PIN ANALYZER BIT TIMING LABEL TIMING SUBLABEL Timing Connector J4, Timing Pod 3 ADDR0 38 0 ADDR ADDR1 36 1 ADDR ADDR2 34 2 ADDR ADDR3 32 3 ADDR PORT B ADDR4 30 4 ADDR PORT B ADDR5 28 5 ADDR PORT B ADDR6 26 6 ADDR PORT B ADDR7 24 7 ADDR PORT B ADDR8 22 8 ADDR PORT B ADDR9 20 9 ADDR PORT B ADDR10 18 10 ADDR PORT B ADDR11 16 11 ADDR PORT A ADDR12 14 12 ADDR
Reference Signal-to-connector mapping (Timing) CPU32 SIGNAL NAME E2480A TIMING CONNECTOR PIN ANALYZER BIT TIMING LABEL TIMING SUBLABEL Timing Connector J4, Timing Pod 4 ADDR16 37 0 ADDR PORT A ADDR17 35 1 ADDR PORT A ADDR18 33 2 ADDR PORT A FC0/CS3 31 3 PORT C CSx FC1/CS4 29 4 PORT C CSx FC2/CS5 27 5 PORT C CSx ADDR19/~CS6 25 6 ADDR PORT C CSx ADDR20/~CS7 23 7 ADDR PORT C CSx ADDR21/~CS8 21 8 ADDR PORT C CSx ADDR22/~CS9 19 9 ADDR PORT C CSx ADDR23/
Reference Signal-to-connector mapping (Timing) CPU32 SIGNAL NAME Timing Connector J2, Timing Pod 5 E2480A TIMING CONNECTOR PIN ANALYZER BIT TIMING LABEL 338 336, 376 333 MISO MISO MISO 38 0 PORT Q MOSI MOSI MOSI 36 1 PORT Q SCK SCK SCK 34 2 PORT Q PCS0/SS PCS0/SS PCS0/SS 32 3 PORT Q PCS1 PCS1 PCS1 30 4 PORT Q PCS2 PCS2 PCS2 28 5 PORT Q PCS3 PCS3 PCS3 26 6 PORT Q TxD TxD TxD 24 7 PORT Q RxD RxD RxD 22 8 CTS24B CTM2C nc 20 9 CTS24A CTD3 nc 1
Reference Signal-to-connector mapping (Timing) CPU32 SIGNAL NAME Timing Connector J2, Timing Pod 6 E2480A TIMING CONNECTOR PIN ANALYZER BIT TIMING LABEL 338 376, 336, 335, 334, 333, 332 331 CTIO0 TP0 nc 37 0 TPU CTIO1 TP1 IC1 35 1 TPU CTD10 TP2 IC2 33 2 TPU CTD9 TP3 IC3 31 3 TPU CTD8 TP4 OC1 29 4 TPU CTD7 TP5 OC1/OC2 27 5 TPU CTD6 TP6 OC1/OC3 25 6 TPU CTD5 TP7 nc 23 7 TPU CTD4 TP8 OC1/OC4 21 8 TPU CTIO2 TP9 OC1/OC5/IC4 19 9 TPU CTIO3 TP10
Reference Signal-to-connector mapping (Timing) CPU32 SIGNAL NAME Timing Connector J3, Timing Pod 7 E2480A TIMING CONNECTOR PIN ANALYZER BIT TIMING LABEL 338 336, 376 335, 334, 333, 332, 331 ModClk ModClk ModClk 38 0 PORT F IRQ1 IRQ1 IRQ1 36 1 PORT F IRQ2 IRQ2 IRQ2 34 2 PORT F IRQ3 IRQ3 IRQ3 32 3 PORT F IRQ4 IRQ4 IRQ4 30 4 PORT F IRQ5 IRQ5 IRQ5 28 5 PORT F IRQ6 IRQ6 IRQ6 26 6 PORT F IRQ7 IRQ7 IRQ7 24 7 PORT F nc CDT10 nc 22 8 nc CTD9/CTM2L nc 20
Reference Signal-to-connector mapping (Timing) CPU32 SIGNAL NAME Timing Connector J3, Timing Pod 8 (338 is nc) E2480A TIMING CONNECTOR PIN ANALYZER BIT TIMING LABEL 336, 376 333 334 335, 332, 331 A2D_A0 A2D_B0 nc nc 37 0 A2D_A1 A2D_B1 nc nc 35 1 A2D_A2 A2D_B2 nc nc 33 2 A2D_A3 A2D_B3 nc nc 31 3 A2D_A4 A2D_B4 nc nc 29 4 A2D_A5 A2D_B5 nc nc 27 5 A2D_A6 A2D_B6 nc nc 25 6 A2D_A7 A2D_B7 VDDA MISO 23 7 PORT Q* A2D_B0 A2D_A0 VSSA MOSI 21 8 PORT Q* A2
Reference State connector signal definition State connector signal definition The following table defines the state connectors, the logic analyzer bit assignments, and the label/sublabel(s) to which a signal belongs. This table aids in reconfiguring the logic analyzer to match a particular microcontroller configuration.
Reference State connector signal definition CPU32 SIGNAL NAME E2480A STATE CONNECTOR PIN ANALYZER BIT STATE LABEL STATE SUBLABEL State Connector J1, State Pod 2 ~SHOW_CYCLE 37 0 STAT ~ShoCy R/~W 35 1 STAT R/~W ~INST_FETCH 33 2 STAT ~IFtch ~PIPE_FLUSH 31 3 STAT ~PFlsh SIZ0 29 4 STAT SIZx SIZ1 27 5 STAT SIZx DSAck0 25 6 STAT DSACKx DSAck1 23 7 STAT DSACKx ~BERR 21 8 STAT ~BErr ~Freeze 19 9 STAT ~Freez ~Bkpt 17 10 STAT ~Bkpt ~BGAck 15 11 STAT ~BG
Reference State connector signal definition CPU32 SIGNAL NAME E2480A STATE CONNECTOR PIN ANALYZER BIT STATE LABEL STATE SUBLABEL State Connector J6, State Pod 3 ADDR0 38 0 ADDR ADDR1 36 1 ADDR ADDR2 34 2 ADDR ADDR3 32 3 ADDR ADDR4 30 4 ADDR ADDR5 28 5 ADDR ADDR6 26 6 ADDR ADDR7 24 7 ADDR ADDR8 22 8 ADDR ADDR9 20 9 ADDR ADDR10 18 10 ADDR ADDR11 16 11 ADDR ADDR12 14 12 ADDR ADDR13 12 13 ADDR ADDR14 10 14 ADDR ADDR15 8 15 ADDR ~Freeze 6 CL
Reference State connector signal definition CPU32 SIGNAL NAME E2480A STATE CONNECTOR PIN ANALYZER BIT STATE LABEL 0 ADDR STATE SUBLABEL State Connector J6, State Pod 4 ADDR16 37 ADDR17 35 1 ADDR ADDR18 33 2 ADDR ADDR19 31 3 ADDR ADDR20 29 4 ADDR ADDR21 27 5 ADDR ADDR22 25 6 ADDR ADDR23 23 7 ADDR ~BGAck 5 CLK 4–18 E2480A Motorola CPU32 Preprocessor Interface
Reference Repair Strategy Repair Strategy The repair strategy for this preprocessor interface is board replacement. However, the following table lists some mechanical parts that may be replaced if they are damaged or lost. Contact your nearest Hewlett-Packard Sales Office for further information on servicing the board. Exchange assemblies are available when a repairable assembly is returned to Hewlett-Packard. These assemblies have been set up on the "Exchange Assembly" program.
Circuit Board Dimensions The following figure gives the dimensions for the preprocessor interface assembly. The dimensions are listed in inches and millimeters.
5 If You Have a Problem
If You Have a Problem Occasionally, a measurement may not give the expected results. If you encounter difficulties while making measurements, use this chapter to guide you through some possible solutions. Each heading lists a problem you may encounter, along with some possible solutions.
Analyzer Problems This section lists general problems that you might encounter while using the analyzer. Intermittent data errors This problem is usually caused by poor connections, incorrect signal levels, or marginal timing. Remove and reseat all cables and probes, ensuring that there are no bent pins on the preprocessor interface or poor probe connections. Adjust the threshold level of the data pod to match the logic levels in the system under test.
Chapter 5: If You Have a Problem Analyzer Problems No activity on activity indicators Check for loose cables, board connections, and preprocessor interface connections. Check for bent or damaged pins on the preprocessor probe. No trace list display If there is no trace list display, it may be that your trigger specification is not correct for the data you want to capture, or that the trace memory is only partially filled.
Preprocessor Problems This section lists problems that you might encounter when using a preprocessor. If the solutions suggested here do not correct the problem, you may have a damaged preprocessor. Contact your local Hewlett-Packard Sales Office if you need further assistance.
Chapter 5: If You Have a Problem Preprocessor Problems Erratic trace measurements There are several general problems that can cause erratic variations in trace lists and inverse assembly failures. Do a full reset of the target system before beginning the measurement. Some preprocessor designs require a full reset to ensure correct configuration. Ensure that your target system meets the timing requirements of the processor with the preprocessor probe installed. See “Capacitive Loading” in this chapter.
Inverse Assembler Problems This section lists problems that you might encounter while using the inverse assembler. When you obtain incorrect inverse assembly results, it may be unclear whether the problem is in the preprocessor or in your target system. If you follow the suggestions in this section to ensure that you are using the preprocessor and inverse assembler correctly, you can proceed with confidence in debugging your target system.
Chapter 5: If You Have a Problem Inverse Assembler Problems Verify that all microprocessor caches and memory managers have been disabled. In most cases, if the microprocessor caches and memory managers remain enabled you should still get inverse assembly. It may be incorrect because a portion of the execution trace was not visible to the logic analyzer. Verify that storage qualification has not excluded storage of all the needed opcodes and operands.
Intermodule Measurement Problems Some problems occur only when you are trying to make a measurement involving multiple modules. An event wasn’t captured by one of the modules If you are trying to capture an event that occurs very shortly after the event that arms one of the measurement modules, it may be missed due to internal analyzer delays.
Messages This section lists some of the messages that the analyzer displays when it encounters a problem. “. . . Inverse Assembler Not Found” This error occurs if you rename or delete the inverse assembler file that is attached to the configuration file. Ensure that the inverse assembler file is not renamed or deleted, and that it is located in the same directory as the configuration file.
Chapter 5: If You Have a Problem Messages “Measurement Initialization Error” This error occurs when you have installed the cables incorrectly for one or two HP 16550A logic analysis cards. The following diagrams show the correct cable connections for one-card and two-card installations. Ensure that your cable connections match the silk screening on the card, and that they are fully seated in the connectors. Then, repeat the measurement.
Chapter 5: If You Have a Problem Messages “No Configuration File Loaded” This is usually caused by trying to load a configuration file for one type of module/system into a different type of module/system. Verify that the appropriate module has been selected from the Load {module} from File {filename} in the HP 16500A/B/C disk operation menu. Selecting Load {All} will cause incorrect operation when loading most preprocessor interface configuration files.
Chapter 5: If You Have a Problem Messages “Time from Arm Greater Than 41.93 ms” The state/timing analyzers have a counter to keep track of the time from when an analyzer is armed to when it triggers. The width and clock rate of this counter allow it to count for up to 41.93 ms before it overflows. Once the counter has overflowed, the system does not have the data it needs to calculate the time between module triggers.
Cleaning the Instrument If this instrument requires cleaning, disconnect it from all power sources and clean it with a mild detergent and water. Make sure the instrument is completely dry before reconnecting it to a power source.
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