Microcontroller User's Manual

MOTOROLA Chapter 2. ColdFire Core 2-27
EMAC Instruction Execution Times
2.12 EMAC Instruction Execution Times
Table 2-16. EMAC Instruction Execution Times
Opcode <EA>
Effective Address
Rn (An) (An)+ -(An) (d16,An)
(d8,An,X
n*SF)
xxx.wl #xxx
muls.w <ea>y, Dx 4(0/0) 6(1/0) 6(1/0) 6(1/0) 6(1/0) 7(1/0) 6(1/0) 4(1/0)
mulu.w <ea>y, Dx 4(0/0) 6(1/0) 6(1/0) 6(1/0) 6(1/0) 7(1/0) 6(1/0) 4(1/0)
muls.l <ea>y, Dx 4(0/0) 6(1/0) 6(1/0) 6(1/0) 6(1/0) — — —
mulu.l <ea>y, Dx 4(0/0) 6(1/0) 6(1/0) 6(1/0) 6(1/0) — — —
mac.w Ry, Rx, Raccx 1(0/0) — — — — — — —
mac.l Ry, Rx, Raccx 1(0/0) — — — — — — —
msac.w Ry, Rx, Raccx 1(0/0) — — — — — — —
msac.l Ry, Rx, Raccx 1(0/0) — — — — — — —
mac.w Ry, Rx, <ea>, Rw,
Raccx
— 2(1/0) 2(1/0) 2(1/0) 2(1/0)
1
1
Effective address of (d16,PC) not supported
———
mac.l Ry, Rx, <ea>, Rw,
Raccx
— 2(1/0) 2(1/0) 2(1/0) 2(1/0)
1
———
msac.w Ry, Rx, <ea>, Rw — 2(1/0) 2(1/0) 2(1/0) 2(1/0)
1
———
msac.l Ry, Rx, <ea>, Rw,
Raccx
— 2(1/0) 2(1/0) 2(1/0) 2(1/0)
1
———
mov.l <ea>y, Raccx 1(0/0) — — — — — — 1(0/0)
mov.l Raccy,Raccx 1(0/0) — — — — — — —
mov.l <ea>y, MACSR 5(0/0) — — — — — — 5(0/0)
mov.l <ea>y, Rmask 4(0/0) — — — — — — 4(0/0)
mov.l <ea>y,Raccext01 1(0/0) — — — — — — 1(0/0)
mov.l <ea>y,Raccext23 1(0/0) — — — — — — 1(0/0)
mov.l Raccx,<ea>x 1(0/0)
2
2
Storing an accumulator requires one additional processor clock cycle when saturation is enabled, or fractional
rounding is performed (MACSR[7:4] = 1---, -11-, --11)
———————
mov.l MACSR,<ea>x 1(0/0) — — — — — — —
mov.l Rmask, <ea>x 1(0/0) — — — — — — —
mov.l Raccext01,<ea.x 1(0/0) — — — — — — —
mov.l Raccext23,<ea>x 1(0/0) — — — — — — —