Microcontroller User's Manual

MOTOROLA Chapter 2. ColdFire Core 2-19
Processor Exceptions
31 30 29 28 27 24 23 20 19 16
Field CL ICA ICSIZ RAM0SIZ ROM0SIZ
Reset 0001_0011_1011_0000
R/W R
15 14 13 12 11 8 7 4 3 0
Field BUSW DCA DCSIZ RAM1SIZ ROM1SIZ
Reset 0001_0000_1000_0000
R/W R
Figure 2-9. D1 Hardware Configuration Info
Table 2-9. D1 Local Memory Hardware Configuration
Information Field Description
Bits Name Description
31–30 CL Cache line size. This field is fixed to a hex value of 0x0 indicating a 16-byte cache line size.
29–28 ICA Instruction cache associativity.
00 Four-way.
01 Direct mapped. (This is the value used for MCF5282)
27–24 ICSIZ Instruction cache size.
0000 No instruction cache.
0001 512B instruction cache.
0010 1KB instruction cache.
0011 2KB instruction cache. (This is the value used for MCF5282)
0100 4KB instruction cache.
0101 8KB instruction cache.
0110 16KB instruction cache.
0111 32KB instruction cache.
1000 64KB instruction cache.
0x9–0xF Reserved.