Microcontroller User's Manual

MOTOROLA Appendix A. Register Memory Map A-15
IPSBAR +
0x10_003C
Port A Clear Output Data Register CLRA 8
IPSBAR +
0x10_003D
Port B Clear Output Data Register CLRB 8
IPSBAR +
0x10_003E
Port C Clear Output Data Register CLRC 8
IPSBAR +
0x10_003F
Port D Clear Output Data Register CLRD 8
IPSBAR +
0x10_0040
Port E Clear Output Data Register CLRE 8
IPSBAR +
0x10_0041
Port F Clear Output Data Register CLRF 8
IPSBAR +
0x10_0042
Port G Clear Output Data Register CLRG 8
IPSBAR +
0x10_0043
Port H Clear Output Data Register CLRH 8
IPSBAR +
0x10_0044
Port J Clear Output Data Register CLRJ 8
IPSBAR +
0x10_0045
Port DD Clear Output Data Register CLRDD 8
IPSBAR +
0x10_0046
Port EH Clear Output Data Register CLREH 8
IPSBAR +
0x10_0047
Port EL Clear Output Data Register CLREL 8
IPSBAR +
0x10_0048
Port AS Clear Output Data Register CLRAS 8
IPSBAR +
0x10_0049
Port QS Clear Output Data Register CLRQS 8
IPSBAR +
0x10_004A
Port SD Clear Output Data Register CLRSD 8
IPSBAR +
0x10_004B
Port TC Clear Output Data Register CLRTC 8
IPSBAR +
0x10_004C
Port TD Clear Output Data Register CLRTD 8
IPSBAR +
0x10_004D
Port UA Clear Output Data Register CLRUA 8
IPSBAR +
0x10_0050
Port B, C, and D Pin Assignment Register PBCDPAR 8
IPSBAR +
0x10_0051
Port F Pin Assignment Register PFPAR 8
IPSBAR +
0x10_0052
Port E Pin Assignment Register PEPAR 16
Table A-3. Register Memory Map (Continued)
Address Name Mnemonic Size