Microcontroller User's Manual

MOTOROLA Chapter 33. Electrical Characteristics 33-11
Processor Bus Output Timing Specifications
Timings listed in Table 33-10 are shown in Figure 33-1.
Figure 33-1. General Input Timing Requirements
33.8 Processor Bus Output Timing Specifications
Table 33-10 lists processor bus output timings.
Table 33-11. External Bus Output Timing Specifications
Name Characteristic Symbol Min Max Unit
Control Outputs
B6a CLKOUT high to chip selects valid
1
t
CHCV
—0.5t
CYC
+10 ns
B6b CLKOUT high to byte enables (BS
[3:0]) valid
2
t
CHBV
—0.5t
CYC
+10 ns
B6c CLKOUT high to output enable (OE
) valid
3
t
CHOV
—0.5t
CYC
+10 ns
B7 CLKOUT high to control output (BS
[3:0], OE) invalid t
CHCOI
0.5t
CYC
+ 2 — ns
B7a CLKOUT high to chip selects invalid t
CHCI
0.5t
CYC
+ 2 — ns
Invalid Invalid
CLKOUT(66.67 MHz)
T
SETUP
T
HOLD
Input Setup And Hold
1.5V
t
rise
= 1.5 ns
V
h
= V
IH
V
l
= V
IL
1.5V1.5V Valid
t
fall
= 1.5 ns
V
h
= V
IH
V
l
= V
IL
Input Rise Time
Input Fall Time
* The timings are also valid for inputs sampled on the negative clock edge.
Inputs
CLKOUT
B4
B5