Microcontroller User's Manual

MOTOROLA Chapter 31. IEEE 1149.1 Test Access Port (JTAG) 31-3
Modes of Operation
31.2 Modes of Operation
The JTAG_EN pin can select between the following modes of operation:
• JTAG mode
• BDM - background debug mode (For more information, refer to Section 29.5,
“Background Debug Mode (BDM)).”
31.3 External Signal Description
The JTAG module has five input and one output external signals, as described in
Table 31-1.
31.3.1 Detailed Signal Description
31.3.1.1 JTAG_EN — JTAG Enable
The JTAG_EN pin selects between Debug module and JTAG. If JTAG_EN is low, the
Debug module is selected; if it is high, the JTAG is selected. Table 31-2 summarizes the pin
function selected depending upon JTAG_EN logic state.
When one module is selected, the inputs into the other module are disabled or forced to a
known logic level as shown in Table 31-3, in order to disable the corresponding module.
Table 31-1. Signal Properties
Name Direction Function Reset State Pull up
JTAG_EN Input JTAG/BDM selector input — —
TCLK Input JTAG Test clock input — Active
TMS/BKPT Input JTAG Test mode select / BDM Breakpoint — Active
TDI/DSI Input JTAG Test data input / BDM Development serial input — Active
TRST/DSCLK Input JTAG Test reset input / BDM Development serial clock — Active
TDO/DSO Output JTAG Test data output / BDM Development serial output Hi-Z / 0 —
Table 31-2. Pin Function Selected
JTAG_EN = 0 JTAG_EN = 1 Pin Name
Module selected BDM JTAG —
Pin Function —
BKPT
DSI
DSO
DSCLK
TCLK
TMS
TDI
TDO
TRST
TCLK
BKPT
DSI
DSO
DSCLK