Microcontroller User's Manual

MOTOROLA Chapter 29. Debug Support 29-7

Programming Model

NOTE:

Debug control registers can be written by the external

development system or the CPU through the WDEBUG

instruction.

CSR is write-only from the programming model. It can be read

or written through the BDM port using the

RDMREG and

WDMREG commands.

29.4.1 Revision A Shared Debug Resources

In the Revision A implementation of the debug module, certain hardware structures are

shared between BDM and breakpoint functionality as shown in Table 29-4.

Thus, loading a register to perform a specific function that shares hardware resources is

destructive to the shared function. For example, a BDM command to access memory

overwrites an address breakpoint in ABHR. A BDM write command overwrites the data

breakpoint in DBR.

Table 29-3. BDM/Breakpoint Registers

DRc[4–0] Register Name Abbreviation Initial State Page

0x00 Configuration/status register CSR 0x00010_0000 p. 29-10

0x01–0x05 Reserved — — —

0x06 Address attribute trigger register AATR 0x0000_0005 p. 29-8

0x07 Trigger definition register TDR 0x0000_0000 p. 29-14

0x08 Program counter breakpoint register PBR — p. 29-13

0x09 Program counter breakpoint mask register PBMR — p. 29-13

0x0A–0x0B Reserved — — —

0x0C Address breakpoint high register ABHR — p. 29-9

0x0D Address breakpoint low register ABLR — p. 29-9

0x0E Data breakpoint register DBR — p. 29-12

0x0F Data breakpoint mask register DBMR — p. 29-12

Table 29-4. Rev. A Shared BDM/Breakpoint Hardware

AATR Bus attributes for all memory commands Attributes for address breakpoint

ABHR Address for all memory commands Address for address breakpoint

DBR Data for all BDM write commands Data for data breakpoint