Microcontroller User's Manual

27-30 MCF5282 User’s Manual MOTOROLA
Register Descriptions
27.6.8.2 Left-Justified Signed Result Register (LJSRR)
27.6.8.3 Left-Justified Unsigned Result Register (LJURR)
Table 27-18. RJURR Field Descriptions
Bit(s) Name Description
15–10 — Reserved, should be cleared.
9–0 RESULT The conversion result is unsigned, right-justified data.
15 14 8
Field S RESULT
Reset Undefined
R/W: R/W
7 0
Field RESULT
Reset Undefined
R/W: R/W
Address IPSBAR + 0x19_0300, 0x19_037e
Figure 27-16. Left-Justified Signed Result Register (LJSRR)
Table 27-19. LJSRR Field Descriptions
Bit(s) Name Description
15 S The left justified, signed format corresponds to a half-scale, offset binary, two’s complement
data format. Conversion values corresponding to 1/2 full scale, 0x0200, or higher are
interpreted as positive values and have a sign bit of 0. An unsigned, right justified conversion
of 0x0200 would be represented as 0x0000 in this signed register, where the sign = 0 and the
result = 0. For an unsigned, right justified conversion of 0x3FF (full range or V
RH
), the signed
equivalent in this register would be 0x7FC0, sign = 0 and result = 0x1FF. For an unsigned, right
justified conversion of 0x0000 (V
RL
), the signed equivalent in this register would be 0x8000,
sign = 1 and result = 0x000, a two’s complement value representing –512.
14–6 RESULT The conversion result is signed, left-justified data.
5–0 — Reserved, should be cleared.
15 8
Field RESULT
Reset Undefined
R/W: R/W