Microcontroller User's Manual

27-26 MCF5282 User’s Manual MOTOROLA
Register Descriptions
27.6.6.2 QADC Status Register 1 (QASR1)
Stop mode resets this register .
27.6.7 Conversion Command Word Table (CCW)
The CCW table is 64 half-word (128 byte) long RAM with 10 bits of each entry
implemented. The CCW table is written by the user and is not modified by the QADC. Each
CCW requests the conversion of one analog channel to a digital result. The CCW specifies
the analog channel number, the input sample time, and whether the queue is to pause after
15 14 13 12 11 10 9 8
Field — CWPQ15 CWPQ14 CWPQ13 CWPQ12 CWPQ11 CWPQ10
Reset 0011_1111
R/W: R
7 6 5 4 3210
Field — CWPQ25 CWPQ24 CWPQ23 CWPQ22 CWPQ21 CWPQ20
Reset 0011_1111
R/W: R
Address IPSBAR + 0x19_0012, 0x19_0013
Figure 27-13. QADC Status Register 1 (QASR1)
Table 27-13. QASR1 Field Descriptions
Bit(s) Name Description
15–14 — Reserved, should be cleared.
13–8 CWPQ1 Queue 1 command word pointer. Points to the last queue 1 CCW executed. This is a read-only
field with a valid range of 0 to 63; writes have no effect. CWPQ1 always points to the last
executed CCW in queue 1, regardless of which queue is active.
In contrast to CWP, CPWQ1 is updated when a conversion result is written. When the QADC
finishes a conversion in queue 1, both the result register is written and CWPQ1 is updated.
When queue 1 operation is terminated after a CCW is read that is pointed to by BQ2, CWP
points to BQ2 while CWPQ1 points to the last queue 1 CCW.
During stop mode, CWPQ1 is reset to 63, because the control registers and the analog logic are
reset. When debug mode is entered, CWPQ1 is not changed; it points to the last executed CCW
in queue 1.
7–6 — Reserved, should be cleared.
5–0 CWPQ Queue 2 command word pointer. Points to the last queue 2 CCW executed. This is a read-only
field with a valid range of 0 to 63; writes have no effect. CWPQ2 always points to the last
executed CCW in queue 2, regardless which queue is active.
In contrast to CWP, CPWQ2 is updated when a conversion result is written. When the QADC
finishes a conversion in queue 2, both the result register is written and CWPQ2 is updated.
During stop mode, CWPQ2 is reset to 63 because the control registers and the analog logic are
reset. When debug mode is entered, CWPQ2 is not changed; it points to the last executed CCW
in queue 2.