Microcontroller User's Manual

MOTOROLA Chapter 1. Overview 1-3

MCF5282 Key Features

• Three universal asynchronous/synchronous receiver transmitters (UARTs)

— 16-bit divider for clock generation

— Interrupt control logic

— Maskable interrupts

— DMA support

— Data formats can be 5, 6, 7, or 8 bits with even, odd, or no parity

— Up to 2 stop bits in 1/16 increments

— Error-detection capabilities

— Modem support includes request-to-send (URTS

) and clear-to-send (UCTS)

lines for two UARTs

— Transmit and receive FIFO buffers

•I

C module

— Interchip bus interface for EEPROMs, LCD controllers, A/D converters, and

keypads

— Fully compatible with industry-standard I

C bus

— Master or slave modes support multiple masters

— Automatic interrupt generation with programmable level

• Queued serial peripheral interface (QSPI)

— Full-duplex, three-wire synchronous transfers

— Up to four chip selects available

— Master mode operation only

— Programmable master bit rates

— Up to 16 pre-programmed transfers

• Queued analog-to-digital converter (QADC)

— 8 direct, or up to 18 multiplexed, analog input channels

— 10-bit resolution +/- 2 counts accuracy

— Minimum 7 µS conversion time

— Internal sample and hold

— Programmable input sample time for various source impedances

— Two conversion command queues with a total of 64 entries

— Sub-queues possible using pause mechanism

— Queue complete and pause software interrupts available on both queues

— Queue pointers indicate current location for each queue