Microcontroller User's Manual

MOTOROLA Chapter 26. General Purpose I/O Module 26-17
Memory Map/Register Definition
26.3.2.7 Port F Pin Assignment Register (PFPAR)
The PFPAR controls the pin function of port F[7:5].
7654 0
Field PFPA7 PFPA6 PFPA5 —
Reset See Note 1
1
1
Reset state determined during reset configuration. PFPAn = 1 in master mode and 0 in all other modes.
0_0000
R/W: R/W R
Address IPSBAR + 0x10_0051
Figure 26-20. Port F Pin Assignment Register (PFPAR)
Table 26-11. PFPAR Field Descriptions
Bits Name Description
7 PFPA7 Port F pin assignment 1. The PFPA7 bit configures the port F7 pin for its primary
function (A23), alternate function (CS6), or digital I/O.
1 Port F7 pin configured for primary function (A23) or alternate function (CS6),
depending on the chip configuration.
0 Port F7 pin configured for digital I/O
Refer to Chapter 30, “Chip Configuration Module (CCM)” for more information
on reset configuration.
6 PFPA6 Port F pin assignment 6. The PFPA6 bit configures the port F6 pin for its primary
function (A22), alternate function (CS5
), or digital I/O.
1 Port F6 pin configured for primary function (A22) or alternate function (CS5),
depending on the chip configuration.
0 Port F6 pin configured for digital I/O
Refer to Chapter 30, “Chip Configuration Module (CCM)” for more information
on reset configuration.
5 PFPA5 Port F pin assignment 5. The PFPAR bit configures the port F5 pin for its primary
function (A21), alternate function (CS4
), or digital I/O.
1 Port F5 pin configured for primary function (A21) or alternate function (CS4),
depending on the chip configuration.
0 Port F5 pin configured for digital I/O
Refer to Chapter 30, “Chip Configuration Module (CCM)” for more information
on reset configuration.
4–0 — Reserved, should be cleared.