Microcontroller User's Manual

26-14 MCF5282 User’s Manual MOTOROLA
Memory Map/Register Definition
26.3.2.5 Port B/C/D Pin Assignment Register (PBCDPAR)
The PBCDPAR controls the pin function of ports B, C, and D.
The PBCDPAR register is read/write.
765 0
Field PBPA PCDPA —
Reset See Note 1
1
1
Reset state determined during reset configuration as shown in Table 26-8.
See Note 1 00_0000
R/W: R/W R/W R
Address IPSBAR + 0x10_0050
Figure 26-18. Port B/C/D Pin Assignment Register (PBCDPAR)
Table 26-7. PBCDPAR Field Descriptions
Bits Name Description
7 PBPA Port B pin assignment. Configures the port B pins for their primary function
(D[23:16]) or digital I/O.
1 Port B pins configured for primary function (D[23:16])
0 Port B pins configured for digital I/O
6 PCDPA Ports C,D pin assignment. Configures the port C and D pins for their primary
functions (D[15:8], D[7:0]) or digital I/O.
1 Port C,D pins configured for primary function (D[15:8], D[7:0])
0 Port C,D pins configured for digital I/O
5–0 — Reserved, should be cleared.
Table 26-8. Reset Values for PBCDPAR Bits
Mode of Operation
Port Size of
External Boot
Device
1
1
Note if the port size of the external boot device is less than the port size of the
external SDRAM, the PBCDPAR register must be written after reset to enable
the primary function(s) on ports B,C, and D, before any SDRAM accesses are
attempted.
PBPA Reset
Valu e
PCDPA Reset
Valu e
Master mode 8-bit 0 0
16-bit 1 0
32-bit 1 1
Single chip mode N/A 0 0