Microcontroller User's Manual

MOTOROLA Chapter 25. FlexCAN 25-3
Features
25.1.1 FlexCAN Memory Map
The FlexCAN module address space is split into 128 bytes starting at the base address, and
then an extra 256 bytes starting at the base address +128. The upper 256 are fully used for
the message buffer structures, as described in Section 25.3.2, “Message Buffer Memory
Map.” Out of the lower 128 bytes, only part is occupied by various registers.
Table 25-1. FlexCAN Memory Map
25.1.2 External Signals
The FlexCAN module/CAN transceiver is composed of two signals: CANTX, which is the
serial transmitted data, and CANRX, which is the serial received data.
IPSBAR
Offset
[31:24] [23:16] [15:8] [7:0]
0x1C_0000 Module Configuration Register (MCR) Reserved
0x1C_0004 Reserved Control Register 0
(CANCTRL0)
Control Register 1
(CANCTRL1)
0x1C_0008 Prescaler Divider (PRESDIV) Control Register 2
(CANCTRL2)
Free Running Timer (TIMER)
0x1C_000C Reserved Reserved
0x1C_0010 Rx Global Mask (RXGMASK)
0x1C_0014 Rx Buffer 14 Mask (RX14MASK)
0x1C_0018 Rx Buffer 15 Mask (RX15MASK)
0x1C_0020 Error and Status (ESTAT) Interrupt Masks (IMASK)
0x1C_0024 Interrupt Flags (IFLAG) Rx Error Counter
(RXECTR)
Tx Error Counter
(TXECTR)
0x1C_0034–
0x1C_007F
Reserved Reserved
0x1C_0080–
0x1C_017F
Message Buffers 0–15