Microcontroller User's Manual

24-6 MCF5282 User’s Manual MOTOROLA
Programming Model
24.5 Programming Model
Table 24-1 lists the configuration registers used in the I
2
C interface.
24.5.1 I
2
C Address Register (I2ADR)
The I2ADR holds the address the I
2
C responds to when addressed as a slave. Note that it is
not the address sent on the bus during the address transfer.
Table 24-2 describes I2ADR fields.
Table 24-1. I
2
C Interface Memory Map
IPSBAR
Offset
[31:24] [23:16] [15:8] [7:0]
0x300 I
2
C Address Register (I2ADR) [p. 24-6] Reserved
0x304 I
2
C Frequency Divider Register (I2FDR) [p. 24-7] Reserved
0x308 I
2
C Control Register (I2CR) [p. 24-8] Reserved
0x30C I
2
C Status Register (I2SR) [p. 24-9] Reserved
0x310 I
2
C Data I/O Register (I2DR) [p. 24-10] Reserved
7 10
Field ADR —
Reset 0000_0000
R/W R/W
Address IPSBAR + 0x300
Figure 24-5. I
2
C Address Register (I2ADR)
Table 24-2. I2ADR Field Descriptions
Bits Name Description
7–1 ADR Slave address. Contains the specific slave address to be used by the I
2
C module. Slave mode is the default I
2
C
mode for an address match on the bus.
0 — Reserved, should be cleared.