Microcontroller User's Manual

MOTOROLA About This Book xlv
Organization
Chapter 17, “Fast Ethernet Controller (FEC),” provides a feature-set overview, a
functional block diagram, and transceiver connection information for both MII
(Media Independent Interface) and 7-wire serial interfaces. It also provides
describes operation and the programming model.
Chapter 18, “Watchdog Timer Module,” describes Watchdog timer functionality,
including operation in low power mode.
Chapter 19, “Programmable Interrupt Timer Modules (PIT0–PIT3),” describes the
functionality of the four PIT timers, including operation in low power mode.
Chapter 20, “General Purpose Timer Modules (GPTA and GPTB),” describes the
functionality of the two general purpose timers, including operation in low power
mode.
Chapter 21, “DMA Timers (DTIM0–DTIM3),” describes the configuration and
operation of the four DMA timer modules (DTIM0, DTIM1, DTIM2, and DTIM3).
These 32-bit timers provide input capture and reference compare capabilities with
optional signaling of events using interrupts or triggers. This chapter also provides
programming examples.
Chapter 22, “Queued Serial Peripheral Interface (QSPI) Module,” provides a
feature-set overview and a description of operation, including details of the QSPI’s
internal storage organization. The chapter concludes with the programming model
and a timing diagram.
Chapter 23, “UART Modules,” describes the use of the universal asynchronous
receiver/transmitters (UARTs) implemented on the MCF5282 and includes
programming examples.
Chapter 24, “I2C Interface,” describes the MCF5282 I
2
C module, including I
2
C
protocol, clock synchronization, and I
2
C programming model registers. It also
provides extensive programming examples.
Chapter 25, “FlexCAN,” describes the MCF5282 implementation of the controller
area network (CAN) protocol. This chapter describes FlexCAN module operation
and provides a programming model.
Chapter 26, “General Purpose I/O Module,” describes the operation and
programming model of the general purpose I/O (GPIO) ports on the MCF5282.
Chapter 30, “Chip Configuration Module (CCM),” describes CCM functionality,
detailing the two modes of chip operation: master mode and single-chip mode. This
chapter provides a description of signals used by the CCM and a programming
model.
Chapter 27, “Queued Analog-to-Digital Converter (QADC),” describes the use of
the QADC module implemented on the MCF5282.
Chapter 28, “Reset Controller Module,” describes the operation of the reset
controller module, detailing the different types of reset that can occur.