Microcontroller User's Manual

xlii MCF5282 User’s Manual MOTOROLA
TABLES
Table
Number
Title
Page
Number
33-9 SGFM Flash Module Life Characteristics ................................................................ 33-10
33-10 Processor Bus Input Timing Specifications.............................................................. 33-10
33-11 External Bus Output Timing Specifications ............................................................. 33-11
33-12 SDRAM Timing ....................................................................................................... 33-16
33-13 GPIO Timing
,
........................................................................................................... 33-17
33-13 (V
DD
= 2.7 to 3.6 V, V
SS
= 0 V, V
DDH
= 5 V) ........................................................ 33-17
33-14 Reset and Configuration Override Timing ............................................................... 33-18
33-15 I
2
C Input Timing Specifications between SCL and SDA......................................... 33-19
33-16 I
2
C Output Timing Specifications between SCL and SDA..................................... 33-20
33-17 MII Receive Signal Timing ...................................................................................... 33-21
33-18 MII Transmit Signal Timing..................................................................................... 33-22
33-19 MII Async Inputs Signal Timing .............................................................................. 33-22
33-20 MII Serial Management Channel Timing................................................................. 33-23
33-21 Timer Module AC Timing Specifications ................................................................ 33-24
33-22 QSPI Modules AC Timing Specifications................................................................ 33-24
33-23 JTAG and Boundary Scan Timing............................................................................ 33-25
33-24 Debug AC Timing Specification .............................................................................. 33-27
A-1 CPU Space Register Memory Map.............................................................................. A-1
A-2 Module Memory Map Overview ................................................................................. A-2
A-3 Register Memory Map ................................................................................................. A-3