Microcontroller User's Manual

MOTOROLA Chapter 18. Watchdog Timer Module 18-1
Chapter 18
Watchdog Timer Module
18.1 Introduction
The watchdog timer is a 16-bit timer used to help software recover from runaway code. The
watchdog timer has a free-running down-counter (watchdog counter) that generates a reset
on underflow. To prevent a reset, software must periodically restart the countdown by
servicing the watchdog.
18.2 Low-Power Mode Operation
This subsection describes the operation of the watchdog module in low-power modes and
halted mode of operation. Low-power modes are described in Chapter 7, “Power
Management.” Table 3-1 shows the watchdog module operation in the low-power modes,
and shows how this module may facilitate exit from each mode.
Table 18-1. Watchdog Module Operation in Low-power Modes
In wait mode with the watchdog control register’s WAIT bit (WCR[WAIT]) set, watchdog
timer operation stops. In wait mode with the WCR[WAIT] bit cleared, the watchdog timer
continues to operate normally. In doze mode with the WCR[DOZE] bit set, the watchdog
timer module operation stops. In doze mode with the WCR[DOZE] bit cleared, the
watchdog timer continues to operate normally. Watchdog timer operation stops in stop
mode. When stop mode is exited, the watchdog timer continues to operate in its pre-stop
mode state.
Low-power Mode Watchdog Operation Mode Exit
Wait Normal if WCR[WAIT] cleared,
stopped otherwise
Upon Watchdog reset
Doze Normal if WCR[DOZE] cleared,
stopped otherwise
Upon Watchdog reset
Stop Stopped No
Halted Normal if WCR[HALTED] cleared,
stopped otherwise
Upon Watchdog reset