Microcontroller User's Manual
xl MCF5282 User’s Manual MOTOROLA
TABLES
Table
Number
Title
Page
Number
26-17 PTCPAR Field Descriptions..................................................................................... 26-22
26-18 PTDPAR Field Descriptions..................................................................................... 26-23
26-19 PUAPAR Field Descriptions .................................................................................... 26-24
27-1 Multiplexed Analog Input Channels........................................................................... 27-7
27-2 QADC Memory Map .................................................................................................. 27-8
27-3 QADCMCR Field Descriptions.................................................................................. 27-9
27-4 QACR0 Field Descriptions....................................................................................... 27-12
27-5 Prescaler fSYS Divide-by Values............................................................................. 27-13
27-6 QACR1 Field Descriptions....................................................................................... 27-14
27-7 Queue 1 Operating Modes ........................................................................................ 27-15
27-8 QACR2 Field Descriptions....................................................................................... 27-18
27-9 Queue 2 Operating Modes ........................................................................................ 27-18
27-10 QASR0 Field Descriptions ....................................................................................... 27-23
27-11 CCW Pause Bit Response......................................................................................... 27-24
27-12 Queue Status ............................................................................................................. 27-24
27-13 QASR1 Field Descriptions ....................................................................................... 27-26
27-14 CCW Field Descriptions........................................................................................... 27-27
27-15 Input Sample Times .................................................................................................. 27-28
27-16 Non-Multiplexed Channel Assignments and Signal Designations........................... 27-28
27-17 Multiplexed Channel Assignments and Signal Designations ................................... 27-29
27-18 RJURR Field Descriptions........................................................................................ 27-30
27-19 LJSRR Field Descriptions ........................................................................................ 27-30
27-20 LJURR Field Descriptions........................................................................................ 27-31
27-21 Analog Input Channels ............................................................................................. 27-34
27-22 Trigger Events........................................................................................................... 27-40
27-23 Status Bits ................................................................................................................. 27-40
27-24 External Circuit Settling Time to 1/2 LSB ............................................................... 27-74
27-25 Error Resulting from Input Leakage (IOff) .............................................................. 27-75
27-26 QADC Status Flags and Interrupt Sources ............................................................... 27-76
28-1 Reset Controller Signal Properties............................................................................. 28-2
28-2 Reset Controller Memory Map ................................................................................... 28-3
28-3 RCR Field Descriptions .............................................................................................. 28-3
28-4 RSR Field Descriptions .............................................................................................. 28-5
28-5 Reset Source Summary............................................................................................... 28-6
29-1 Debug Module Signals................................................................................................ 29-2
29-2 Processor Status Encoding.......................................................................................... 29-3
29-3 BDM/Breakpoint Registers......................................................................................... 29-7
29-4 Rev. A Shared BDM/Breakpoint Hardware ............................................................... 29-7
29-5 AATR Field Descriptions ........................................................................................... 29-8
29-6 ABLR Field Description........................................................................................... 29-10
29-7 ABHR Field Description .......................................................................................... 29-10
29-8 CSR Field Descriptions ............................................................................................ 29-11
29-9 DBR Field Descriptions............................................................................................ 29-13










