Microcontroller User's Manual

17-38 MCF5282 User’s Manual MOTOROLA
Programming Model
17.5.4.15 Descriptor Individual Lower Address (IALR)
The IALR register is written by the user. This register contains the lower 32 bits of the
64-bit individual address hash table used in the address recognition process to check for
possible match with the DA field of receive frames with an individual DA. This register is
not reset and must be initialized by the user.
31 16
Field IADDR1
Reset Uninitialized
R/W R/W
15 0
Field IADDR1
Reset Uninitialized
R/W R/W
Address IPSBAR + 0x1118
Figure 17-17. Descriptor Individual Upper Address Register (IAUR)
Table 17-26. IAUR Field Descriptions
Bits Name Descriptions
31–0 IADDR1 The upper 32 bits of the 64-bit hash table used in the address
recognition process for receive frames with a unicast
address. Bit 31 of IADDR1 contains hash index bit 63. Bit 0
of IADDR1 contains hash index bit 32.
31 16
Field IADDR2
Reset Uninitialized
R/W R/W
15 0
Field IADDR2
Reset Uninitialized
R/W R/W
Address IPSBAR + 0x111C
Figure 17-18. Descriptor Individual Lower Address Register (IALR)