Microcontroller User's Manual

ILLUSTRATIONS
Figure
Number
Title
Page
Number
xxxii MCF5282 User’s Manual MOTOROLA
29-39 WDMREG BDM Command Format............................................................................ 29-36
29-40 WDMREG Command Sequence.................................................................................. 29-36
29-41 Recommended BDM Connector............................................................................... 29-46
30-1 Chip Configuration Module Block Diagram .............................................................. 30-2
30-2 Chip Configuration Register (CCR) ........................................................................... 30-5
30-3 Reset Configuration Register (RCON) ....................................................................... 30-6
30-4 Chip Identification Register (CIR) ............................................................................. 30-8
31-1 JTAG Block Diagram ................................................................................................. 31-2
31-2 IDCODE Register ....................................................................................................... 31-5
31-3 TAP Controller State Machine Flow .......................................................................... 31-8
32-1 MCF5282 Pinout (256 MAPBGA)............................................................................. 32-2
32-2 256 MAPBGA Package Dimensions.......................................................................... 32-7
33-1 General Input Timing Requirements ........................................................................ 33-11
33-2 Read/Write (Internally Terminated) Timing............................................................. 33-13
33-3 Read Bus Cycle Terminated by TA.......................................................................... 33-14
33-4 Read Bus Cycle Terminated by TEA ....................................................................... 33-15
33-5 SDRAM Read Cycle................................................................................................. 33-16
33-6 SDRAM Write Cycle................................................................................................ 33-17
33-7 GPIO Timing ............................................................................................................ 33-18
33-8 RSTI and Configuration Override Timing................................................................ 33-19
33-9 I
2
C Input/Output Timings......................................................................................... 33-20
33-10 MII Receive Signal Timing Diagram ....................................................................... 33-21
33-11 MII Transmit Signal Timing Diagram...................................................................... 33-22
33-12 MII Async Inputs Timing Diagram .......................................................................... 33-22
33-13 MII Serial Management Channel Timing Diagram.................................................. 33-23
33-14 QSPI Timing ............................................................................................................. 33-24
33-15 Test Clock Input Timing........................................................................................... 33-25
33-16 Boundary Scan (JTAG) Timing................................................................................ 33-26
33-17 Test Access Port Timing........................................................................................... 33-26
33-18 TRST Timing............................................................................................................ 33-26
33-19 BKPT Timing ........................................................................................................... 33-27
33-20 Real-Time Trace AC Timing.................................................................................... 33-28
33-21 BDM Serial Port AC Timing .................................................................................... 33-28