Microcontroller User's Manual

12-6 MCF5282 User’s Manual MOTOROLA
Chip Select Registers
12.4.1 Chip Select Module Registers
The chip select module is programmed through the chip select address registers
(CSAR0–CSAR6), chip select mask registers (CSMR0–CSMR6), and the chip select
control registers (CSCR0–CSCR6).
12.4.1.1 Chip Select Address Registers (CSAR0–CSAR6)
The CSARs, Figure 12-2, specify the chip select base addresses.
Table 12-6 describes CSAR[BA].
0x00_00AC Reserved
1
Chip select control register—bank 3 (CSCR3)
[p. 12-8]
0x00_00B0 Chip select address register—bank 4 (CSAR4)
[p. 12-6]
Reserved
1
0x00_00B4 Chip select mask register—bank 4 (CSMR4) [p. 12-7]
0x00_00B8 Reserved
1
Chip select control register—bank 4 (CSCR4)
[p. 12-8]
0x00_00BC Chip select address register—bank 5 (CSAR5)
[p. 12-6]
Reserved
1
0x00_00C0 Chip select mask register—bank 5 (CSMR5) [p. 12-7]
0x00_00C4 Reserved
1
Chip select control register—bank 5 (CSCR5)
[p. 12-8]
0x00_00C8 Chip select address register—bank 6 (CSAR6)
[p. 12-6]
Reserved
1
0x00_00CC Chip select mask register—bank 6 (CSMR6) [p. 12-7]
0x00_00D0 Reserved
1
Chip select control register—bank 6 (CSCR6)
[p. 12-8]
1
Addresses not assigned to a register and undefined register bits are reserved for expansion. Write accesses to
these reserved address spaces and reserved register bits have no effect.
15 0
Field BA
Reset Uninitialized
R/W R/W
Address 0x080 (CSAR0); 0x08C (CSAR1); 0x098 (CSAR2); 0x0A4 (CSAR3);
0x0B0 (CSAR4); 0x0BC (CSAR5); 0x0C8 (CSAR6)
Figure 12-2. Chip Select Address Registers (CSARn)
Table 12-5. Chip Select Registers (continued)
IPSBAR
Offset
[31:24] [23:16] [15:8] [7:0]