Microcontroller User's Manual

MOTOROLA Chapter 11. Edge Port Module (EPORT) 11-7
Memory Map and Registers
Table 11-8. EPFR Field Descriptions
Bit(s) Name Description
7–1 EPFx Edge port flag bits. When an EPORT pin is configured for edge triggering, its corresponding
read/write bit in EPFR indicates that the selected edge has been detected. Reset clears
EPF7-EPF1.
Bits in this register are set when the selected edge is detected on the corresponding pin. A bit
remains set until cleared by writing a 1 to it. Writing 0 has no effect. If a pin is configured as
level-sensitive (EPPARx = 00), pin transitions do not affect this register.
1 Selected edge for IRQx
pin has been detected.
0 Selected edge for IRQx
pin has not been detected.
0 — Reserved, should be cleared.