Microcontroller User's Manual

10-12 MCF5282 User’s Manual MOTOROLA
Register Descriptions
10.3.6.1 Interrupt Sources
Table 10-13 and Table 10-14 list the interrupt sources for each interrupt request line for
INTC0 and INTC1.
765320
Field — IL IP
Reset 0000_0000
R/W R/W (Read only for ICRn1-ICRn7)
Address See Table 10-2 and Table 10-3 for register offsets
Figure 10-9. Interrupt Control Register (ICRnx)
Table 10-12. ICRnx Field Descriptions
Bits Name Description
7–6 — Reserved, should be cleared.
5–3 IL Interrupt level. Indicates the interrupt level assigned to each interrupt input.
2–0 IP Interrupt priority. Indicates the interrupt priority for internal modules within the interrupt-level
assignment. 000b represents the lowest priority and 111b represents the highest. For the fixed level
interrupt sources, the priority is fixed at the midpoint for the level, and the IP field will always read as
000b.
Table 10-13. Interrupt Source Assignment for INTC0
Source Module Flag Source Description Flag Clearing Mechanism
1 EPORT EPF1 Edge port flag 1 Write EPF1 = 1
2 EPF2 Edge port flag 2 Write EPF2 = 1
3 EPF3 Edge port flag 3 Write EPF3 = 1
4 EPF4 Edge port flag 4 Write EPF4 = 1
5 EPF5 Edge port flag 5 Write EPF5 = 1
6 EPF6 Edge port flag 6 Write EPF6 = 1
7 EPF7 Edge port flag 7 Write EPF7 = 1
8 SCM SWT1 Software watchdog timeout Cleared when service complete
9 DMA DONE DMA Channel 0 transfer complete Write DONE = 1
10 DONE DMA Channel 1 transfer complete Write DONE = 1
11 DONE DMA Channel 2 transfer complete Write DONE = 1
12 DONE DMA Channel 3 transfer complete Write DONE = 1
13 UART0 Multiple UART0 interrupt Cleared when service complete
14 UART1 Multiple UART1 interrupt Cleared when service complete
15 UART2 Multiple UART2 interrupt Cleared when service complete