Microcontroller User's Manual

xviii MCF5282 User’s Manual MOTOROLA
CONTENTS
Paragraph
Number
Title
Page
Number
25.5.3 FlexCAN Control Register 1 (CANCTRL1).............................................. 25-23
25.5.4 Prescaler Divide Register (PRESDIV) ....................................................... 25-24
25.5.5 FlexCAN Control Register 2 (CANCTRL2).............................................. 25-25
25.5.6 Free Running Timer (TIMER).................................................................... 25-26
25.5.7 Rx Mask Registers...................................................................................... 25-26
25.5.8 FlexCAN Error and Status Register (ESTAT) ........................................... 25-28
25.5.9 Interrupt Mask Register (IMASK).............................................................. 25-30
25.5.10 Interrupt Flag Register (IFLAG)................................................................. 25-31
25.5.11 FlexCAN Receive Error Counter (RXECTR) ............................................ 25-32
25.5.12 FlexCAN Transmit Error Counter (TXECTR)........................................... 25-32
Chapter 26
General Purpose I/O Module
26.1 Introduction....................................................................................................... 26-1
26.1.1 Overview....................................................................................................... 26-3
26.1.2 Features......................................................................................................... 26-3
26.1.3 Modes of Operation ...................................................................................... 26-3
26.2 External Signal Description .............................................................................. 26-4
26.3 Memory Map/Register Definition .................................................................... 26-6
26.3.1 Register Overview ........................................................................................ 26-6
26.3.2 Register Descriptions.................................................................................... 26-8
26.4 Functional Description.................................................................................... 26-25
26.4.1 Overview..................................................................................................... 26-25
26.4.2 Port Digital I/O Timing .............................................................................. 26-25
26.5 Initialization/Application Information............................................................ 26-26
Chapter 27
Queued Analog-to-Digital Converter (QADC)
27.1 Features............................................................................................................. 27-1
27.2 Block Diagram.................................................................................................. 27-2
27.3 Modes of Operation .......................................................................................... 27-3
27.3.1 Debug Mode ................................................................................................. 27-3
27.3.2 Stop Mode..................................................................................................... 27-3
27.4 Signals............................................................................................................... 27-4
27.4.1 Port QA Signal Functions............................................................................. 27-4
27.4.2 Port QB Signal Functions ............................................................................. 27-5
27.4.3 External Trigger Input Signals...................................................................... 27-6
27.4.4 Multiplexed Address Output Signals............................................................ 27-6
27.4.5 Multiplexed Analog Input Signals................................................................ 27-6
27.4.6 Voltage Reference Signals............................................................................ 27-7