Microcontroller User's Manual

3-10 MCF5282 User’s Manual MOTOROLA
Memory Map/Register Set
The following assembly language routine shows the proper sequence for a correct EMAC
state save. This code assumes all Dn and An registers are available for use and the memory
location of the state save is defined by A7.
EMAC_state_save:
move.l macsr,d7 ; save the macsr
clr.l d0 ; zero the register to ...
move.l d0,macsr ; disable rounding in the macsr
move.l acc0,d0 ; save the accumulators
move.l acc1,d1
move.l acc2,d2
move.l acc3,d3
move.l accext01,d4 ; save the accumulator extensions
move.l accext23,d5
move.l mask,d6 ; save the address mask
movem.l #0x00ff,(a7) ; move the state to memory
The following code performs the EMAC state restore:
EMAC_state_restore:
movem.l (a7),#0x00ff ; restore the state from memory
move.l #0,macsr ; disable rounding in the macsr
move.l d0,acc0 ; restore the accumulators
move.l d1,acc1
move.l d2,acc2
move.l d3,acc3
move.l d4,accext01 ; restore the accumulator extensions
move.l d5,accext23
move.l d6,mask ; restore the address mask
move.l d7,macsr ; restore the macsr
By executing this type of sequence, the exact state of the EMAC programming model can
be correctly saved and restored.
3.4.1.1.3 MULS/MULU
MULS and MULU are unaffected by fractional mode operation; operands are still assumed
to be integers.
3.4.1.1.4 Scale Factor in MAC or MSAC Instructions
The scale factor is ignored while the MAC is in fractional mode.
3.4.2 Mask Register (MASK)
The 32-bit MASK implements the low-order 16 bits to minimize the alignment
complications involved with loading and storing only 16 bits. When the MASK is loaded,
the low-order 16 bits of the source operand are actually loaded into the register. When it is
stored, the upper 16 bits are all forced to ones.