Technical information

Chapter 2: Hardware Interface Description
December 15, 2009 G30 - Module Hardware Description 25
Flashing and Data Logging
In the event of logging or reflashing the module SW, the host must provide access to several I/O
lines especially when using the 81 pin LGA interface version.
The G30 SPI interface is used for data logging, and therefore, it is recommended that the host
application will have the ability to support it.
In addition, in order to support G30 SW upgrade, the host application must have access to the
G30 UART signals (TXD, RXD only).
In order to support both data logging, and SW upgrade, it is recommended to use a single header
connector that will contain all required signals with additional SPI indication, VCC and GND
signals.
Note: When a header can’t be implemented due to engineering constrains (lack of place), the
host application should support sufficient soldering pads or test points for wire-up.
60 68 SPI_MOSI O
SPI sync data (MOSI)
Short to pin 5
Generic digital interfaces
voltage domain.
Output driver class D.
PU/PD class B.
Value at reset: T.
63 70 SPI_CS O
SPI chip select
Short to pin 58
Generic digital interfaces
voltage domain.
Output driver class D.
PU/PD class B.
Value at reset: T.
45 66 SPI_CLK O
SPI Clock
Short to Pin 57
Generic digital interfaces
voltage domain.
Output driver class D.
PU/PD class B.
Value at reset: T.
61 64 SPI_MISO I
SPI sync data (MISO)
Short to pin 55
Generic digital interfaces
voltage domain.
Output driver class D.
PU/PD class B.
Value at reset: T.
Table 2-5: SPI Interface Connections (Cont.)
Pin #
(81 pin LGA
interface)
Pin #
(70 pin
connector
interface)
G30
Signal Name
G30
I/O
Function Remarks