Service manual

July 1, 2002 68P81076C25-C
3-20 Theory of Operation: ASTRO Spectra VOCON Board
The DSP accesses this data through its SSI port. This is a 6 port synchronous serial bus. It is used
by the DSP for both transmit and receive data transferal, but only the receive functions will be
discussed here. The ADSIC transfers the data to the DSP on the SRD line at a rate of 2.4 MHz. This
is clocked synchronously by the ADSIC which provides a 2.4 MHz clock on SC0. In addition,
a 20 kHz interrupt is provided on SC1 signaling the arrival of a data packet. This means a new I and
Q sample data packet is available to the DSP at a 20 kHz rate which represents the sampling rate of
the received data. The DSP then processes this data to extract audio, signaling, etc. based on the
20 kHz interrupt.
In addition to the SPI programming bus, the ADSIC also contains a parallel configuration bus
consisting of D8-D23, A0-A2, A13-A15, RD*, and WR*, This bus is used to access registers mapped
into the DSP memory starting at Y:FFF0. Some of these registers are used for additional ADSIC
configuration controlled directly by the DSP. Some of the registers are data registers for the speaker
D/A. Analog speaker audio is processed through this parallel bus where the DSP outputs the
speaker audio digital data words to this speaker D/A and an analog waveform is generated which is
output on SDO (Speaker Data Out). In conjunction with the speaker D/A, the ADSIC contains a
programmable attenuator to set the rough signal attenuation. However, the fine levels and
differences between signal types is adjusted through the DSP software algorithms. The speaker D/A
attenuator setting is programmed by the MCU through the SPI bus.
The ADSIC provides an 8 kHz interrupt to the DSP on IRQB for processing the speaker data
samples. IRQB is also one of the DSP mode configuration pins at start up. This 8 kHz signal must be
enabled through the SPI programming bus by the MCU and is necessary for any audio processing to
occur.
For secure messages, the digital signal data must be passed to the secure module for decryption
prior to processing speaker data. The DSP transfers the data to and from the secure module through
it's SCI port consisting of TXD and RXD. The SCI port is a two wire duplex asynchronous serial port.
Configuration and mode control of the secure module is performed by the MCU through the SPI bus.
The ADSIC presents the analog speaker audio to the command board’s audio power amplifier.,
which drives an external speaker. For more information on this subject, refer to Section
3.2, "Command Board," on page 3-8.
Since all of the audio and signaling is processed in DSP software algorithms, all types of audio and
signalling follow this same path. There is, however, one exception. Low-speed trunking data is
processed by the host µC through the SCLK port of the DSP. This port is connected to port PA0 on
the host µC. The DSP extracts the low-speed data from the received signal and relays it to the host
µC for processing.