Specifications

1 - 2 Symbol SE6700 Integration Guide
Figure 1-1 provides a block diagram of the imager system.
Figure 1-1 Symbol SE6700 Block Diagram
A 30-pin ZIF connector on the Symbol SE6700 connects the engine and the PL6707 decoder via a 40 mm flex
(available from Symbol, p/n 15-99087-01, via KT-SE6700-02/02R). For information about this connector and flex,
see Figure 4-1 on page 4-3 and Figure 4-3 on page 4-5.
The Visible Laser Diode (VLD) and a diffractive optical element (DOE) in the Symbol SE6700 generate an aiming
pattern. The illumination LED allows image capture in any lighting condition.
Image Sensor
The primary component of the imager system is an SXGA 1/2" format CMOS monochrome megapixel resolution
sensor which contains a 1280 x 1024 pixel array. It supports camera functions such as windowing, column and row
skip mode, and snapshot mode. Its low-noise CMOS imaging technology achieves CCD image quality based on
signal-to-noise ratio and low-light sensitivity.
The sensor is programmable via a two-wire serial interface for frame size, exposure, gain setting, and other
parameters. The default mode outputs an SXGA-size image at 30 frames per second (fps). An on-chip
analog-to-digital converter (ADC) provides 10 bits per pixel (the SE6700 outputs the upper 8 bits only).
FRAME_VALID and LINE_VALID signals are output on dedicated pins, with a pixel clock that is synchronous with
valid data.
Figure 1-2 Image Sensor Block Diagram
Laser & Drive
Circuitry
(Aiming)
LED Drive
Circuitry
Aim Enable Illumination
Enable
Oscillator
I
2
C
Monochrome
Mega PIxel
CMOS
Image Sensor
Pixel Data &
Camera Control
Sensor
Clock
Clock
Two-wire serial
Input/Output
10 -bit Data
Sync
Signals
Control Register
Analog Processin g
Active-Pixel
Sensor (AP S)
Array
SXGA
1,280H x 1,024V
Timing and Control
AD C