Digital Photo Keychain User Manual

OVERVIEW AND DATA ALU ARCHITECTURE
3 - 4 DATA ARITHMETIC LOGIC UNIT MOTOROLA
The following paragraphs describe each of these components and provide a description
of data representation, rounding, and saturation arithmetic.
CLOCK
GENERATOR
PERIPHERAL
PINS
INTERNAL
D ATA
BUS
SWITCH
PROGRAM
RAM/ROM
EXPANSION
PROGRAM
INTERRUPT
CONTROLLER
PROGRAM
DECODE
CONTROLLER
PROGRAM
ADDRESS
GENERATOR
YAB
XAB
PAB
YDB
XDB
PDB
GDB
MODC/NMI
MODB/IRQB
RESET
DATA ALU
24X24
+
56
→
56-BIT MAC
TWO 56-BIT ACCUMULATORS
EXTERNAL
ADDRESS
BUS
SWITCH
BUS
CONTROL
EXTERNAL
DATA BUS
SWITCH
ADDRESS
DATA
16 BITS
24 BITS
PORT A
MODA/IRQA
PLL
X MEMORY
RAM/ROM
EXPANSION
Y MEMORY
RAM/ROM
EXPANSION
ADDRESS
GENERATION
UNIT
OnCE™
PERIPHERAL
MODULES
EXPANSION
AREA
CONTROL
24 Bit 56K
Module
Figure 3-1 DSP56K Block Diagram
Program Control Unit