Digital Photo Keychain User Manual
INSTRUCTION DESCRIPTIONS
A - 56 INSTRUCTION SET DETAILS MOTOROLA
Operation: Assembler Syntax:
D[n] ➞ C; BSET #n,X:ea
1 ➞ D[n]
D[n] ➞ C; BSET #n,X:aa
1 ➞ D[n]
D[n] ➞ C; BSET #n,X:pp
1 ➞ D[n]
D[n] ➞ C; BSET #n,Y:ea
1 ➞ D[n]
D[n] ➞ C; BSET #n,Y:aa
1 ➞ D[n]
D[n] ➞ C; BSET #n,Y:pp
1 ➞ D[n]
D[n] ➞ C; BSET #n,D
1 ➞ D[n]
Description: Test the n
th
bit of the destination operand D, set it, and store the result in
the destination location. The state of the n
th
bit is stored in the carry bit C of the condition
code register. The bit to be tested is selected by an immediate bit number from 0–23.
This instruction performs a read-modify-write operation on the destination location using
two destination accesses before releasing the bus. This instruction provides a test-and-
set capability which is useful for synchronizing multiple processors using a shared mem-
ory. This instruction can use all memory alterable addressing modes.
Example:
:
BSET #$0,X:<<$FFE5 ;test and clear bit 14 in I/O Port B Data Reg.
:
BSET Bit Test and Set
Before Execution After Execution
X:$FFE5
X:$FFE5
$000000
SR
SR
$0300
$0300
$000001